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以SnCl_4·5H_2O为锡源,SnF_2为氟源,采用溶胶-凝胶-蒸镀法制备F掺杂的SnO_2透明导电氧化物薄膜(FTO薄膜).通过正交实验研究确定最佳反应温度、反应时间和蒸镀温度等制备条件.主要研究元素F的掺杂和膜的结构对FTO薄膜性能的影响,并采用傅里叶变换红外光谱仪、热重-差热分析、X射线衍射、高分辨透射电子显微镜和扫描电子显微镜等进行样品的性能表征.研究结果表明,当反应温度50?C、反应时间5 h、烧结(蒸镀)温度600?C、镀膜次数1次、而F/Sn=14 mol%时,FTO薄膜性能指数ΦTC最大,综合光电性能最优,表面电阻为14.7?·cm-1,平均透光率为74.4%.FTO薄膜内颗粒的平均粒径为20 nm,呈四方金红石型结构,F的掺入替代了部分的O,形成了SnO_(2-x)F_x晶体结构.F的掺杂量是影响FTO薄膜的主要因素,F过多或过少均不利于SnO_(2-x)F_x晶体的生长;FTO薄膜的结构、颗粒形状、大小等三维信息也是影响薄膜性能的因素,主要表现为分形维数越小,薄膜表面越平整,势垒越低,导电性能越好. 相似文献
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通过扫描电镜和X射线衍射对SiO2衬底上生长并五苯和酞菁铜薄膜的表面形貌进行表征,并得到在SiO2衬底上生长的并五苯薄膜是以岛状结构生长,其大小约为100nm,且薄膜有较好的结晶取向,呈多晶态存在. 酞菁铜薄膜则没有表现出明显的生长机理,其呈非晶态存在. 还对通过掩膜的方法制作得以酞菁铜和并五苯为有源层的顶栅极有机薄膜晶体管的特性进行了研究. 有源层的厚度为40nm,绝缘层SiO2的厚度为250nm,器件的沟道宽长比(W/关键词:
有机薄膜晶体管
并五苯薄膜
酞菁铜薄膜
μEF)')" href="#">场效应迁移率(μEF) 相似文献
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JIANG Kai-Ming ZHENG Zhi-Ming XING Ding-Yu 《理论物理通讯》2006,46(4):743-748
Ballistic spin transport in spin field-effect transistors is studied by taking into account the Rashba spinorbit coupling, interracial scattering, and band mismatch. It is shown that the spin conductance oscillation with the semiconductor channel length is a superimposition of the Rashba spin precession and spin interference oscillations. They have different oscillation periods π/κR and π/κ with κR the Rashba wavevector and κ the Fermi wavevector of the semiconductor channel, and play different parts of slow and rapid oscillations, depending upon the relative magnitude of π/κR and π/κ. Only at κ = κR does the spin conductance exhibit oscillations of a single period. Two types of different behaviors of the tunnelling magnetoresistance are discussed. 相似文献
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Ballistic spin transport in spin field-effect transistors is studied by taking into account the Rashba spinorbit coupling, interfacial scattering, and band mismatch. It is shown that the spin conductance oscillation with the semiconductor channel length is a superimposition of the Rashba spin precession and spin interference oscillations. They have different oscillation periods π/kR and π/k with kR the Rashba wavevector and k the Fermi wavevector of the semiconductor channel, and play different parts of slow and rapid oscillations, depending upon the relative magnitude of π/kR and π/k. Only at k = kR does the spin conductance exhibit oscillations of a single period. Two types of different behaviors of the tunnelling magnetoresistance are discussed. 相似文献
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为了实现氧化物薄膜晶体管(TFT)的低电阻布线,采用Cu作为氧化物TFT的源漏电极。通过优化成膜工艺制备了电阻率低至2.0μΩ·cm的Cu膜,分析了Cu膜的晶体结构、粘附性及其与a-IZO薄膜的界面,制备了以a-IZO为有源层和Cu膜的粘附层的TFT器件。结果表明:所制备的Cu膜呈多晶结构;引入a-IZO粘附层增强了Cu膜与衬底的粘附性;同时,Cu在a-IZO中的扩散得到了抑制。所制备的TFT的迁移率、亚阈值摆幅和阈值电压分别为12.9 cm2/(V·s)、0.28 V/dec和-0.6 V。 相似文献
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为降低氧化锌薄膜晶体管(ZnO TFT)的工作电压,提高迁移率,采用磁控溅射法在氧化铟锡(ITO)导电玻璃基底上室温下依次沉积NbLaO栅介质层和ZnO半导体有源层,制备出ZnO TFT,对器件的电特性进行了表征。该ZnO TFT呈现出优异的器件性能:当栅电压为5 V、漏源电压为10 V时,器件的饱和漏电流高达2.2 m A;有效场效应饱和迁移率高达107 cm~2/(V·s),是目前所报道的室温下溅射法制备ZnO TFT的最高值,亚阈值摆幅为0.28 V/decade,开关电流比大于107。利用原子力显微镜(AFM)对NbLaO和ZnO薄膜的表面形貌进行了分析,分析了器件的低频噪声特性,对器件呈现高迁移率、低亚阈值摆幅以及迟滞现象的机理进行了讨论。 相似文献
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Field-effect transistors (FETs) for logic applications, graphene and MoS2, are discussed. These materials have based on two representative two-dimensional (2D) materials, drastically different properties and require different consider- ations. The unique band structure of graphene necessitates engineering of the Dirac point, including the opening of the bandgap, the doping and the interface, before the graphene can be used in logic applications. On the other hand, MoS2 is a semiconductor, and its electron transport depends heavily on the surface properties, the number of layers, and the carrier density. Finally, we discuss the prospects for the future developments in 2D material transistors. 相似文献
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通过衬底加热和氧化钼(MoO3)修饰源漏极制备了并五苯有机场效应晶体管.研究了衬底温度和电极修饰层厚度对器件性能的影响.实验结果表明:当衬底温度为60℃、MoO3修饰层为10 nm时,器件性能获得了显著增强,场效应迁移率由原来的3.39×10-3 cm2/(V·s)提高到2.25 ×10-1 cm2/(V·s),阈值电压由12 V降低到3V.器件性能的改善归因于:衬底加热可以优化有源层形貌,改善载流子传输;而MoO3修饰层显著降低了电极与有源层之间的接触势垒,提高了载流子的注入.因此,衬底加热与电极修饰对于制备高性能有机场效应晶体管是不可或缺的优化手段. 相似文献
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采用EuF3薄层修饰低功函数金属Ag源、漏电极,制备了CuPc有机场效应晶体管,研究了不同厚度EuF3对器件性能的影响。结果表明,EuF3的厚度由0 nm增至0.6 nm时,接触电阻由23.65×105 Ω·cm减 至3.86×105 Ω·cm,使得器件载流子迁移率由1.5×10-3 cm2·V-1·s-1提高到4.65×10-3 cm2·V-1·s-1。 UPS测试结果表明,薄层EuF3在Ag与有机半导体间形成了界面偶极势垒,使源漏电极表面功函数增大,空穴注入势垒降低,Ag电极与有机半导体层界面的接触电阻减小,进而提升了空穴的注入效率。 相似文献