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1.
In optical time-division multiplexing (OTDM) systems using the four-wave mixing (FWM) in a semiconductor optical amplifier (SOA) for time demultiplexing, the polarization states of control pulse and OTDM data lights are an important factor in the optical time demultiplexing process, which can influence the bit error rate (BER) of OTDM systems. In this paper, we analyze the effect of light polarization states on the FWM of a SOA, and use a simulation approach to study the BER performance of 100 Gbit/s OTDM systems that use the FWM in a SOA for optical time demultiplexing. It reveals that the BER or Q factor of OTDM systems is dependent on the misalignment θ between the polarization states of OTDM data and control lights. With increasing θ, both the optical power of resulting FWM component and the BER performance (or Q factor) of OTDM systems is degraded. For linearly polarized lights, our results show that the increase of BER and the reduction in Q factor are made smoothly when θ changes its value from 0° to 75°, whereas the degradation of BER and Q factor becomes rapid when θ exceeds 75°. Although the best system BER is obtained for θ = 0°, the BER performance can still tolerate some misalignment θ (e.g., up to 20° in our simulation). This is useful for the engineering design and applications of SOA-based optical time demultiplexers.  相似文献   

2.
We demonstrate a reconfigurable all-optical logic gate for NRZ-PolSK signal based on FWM in a highly nonlinear fiber at 10 Gb/s. Half subtracter, XOR, AB?, āB or XNOR, AND, and NOR logic gates can be implemented simultaneously. The input power for the HNLF is optimized to be as low as about 15.2 dBm and the high Q factors above 8 dB for eye diagrams are achieved. Experimental results show Q factors of AB?, āB, AND, and NOR were higher than those of XOR, and XNOR. Error-free operation is achieved experimentally for 10 Gb/s 27-1 pseudorandom bit sequence (PRBS) data. Power penalties for the logic gate are less than 3 dB. Simulation analysis about the wavelength characteristic for all logic gates is given and it predicts that the reconfigurable logic gate can realize error-free operation when the wavelength separation is less than 5 nm.  相似文献   

3.
This paper presents the parameter design and performance analysis of a 160 Gb/s all-optical XOR gate based on cross-gain modulation (XGM) in a nonlinear Mach-Zehnder interferometer (MZI) with quantum dot semiconductor optical amplifiers (QD-SOAs). Detailed numerical simulations of the QD-SOA parameters and optical signal parameters are performed to elevate the gate performance. With the optimized parameters, a Q factor over 8 dB is obtained. The possibility of operating at higher speed of the XOR gate is demonstrated as well. The results will be helpful for the design and performance analysis of practical quantum dot devices.  相似文献   

4.
An all-optical logic AND gate is demonstrated by using a semiconductor optical amplifier (SOA) based Mach-Zehnder interferometer (MZI). The AND results are numerically analyzed by solving the rate equation of SOA. Q-factor values have been calculated. The operation of the AND logic gate is experimentally demonstrated at 80 Gb/s. Operation at higher data rates is feasible using SOAs with shorter phase recovery time.  相似文献   

5.
An all-optical encryption system built on the basis of electrical logic circuit design principles is proposed, using semiconductor optical amplifier (SOA) exclusive or (XOR) logic gates. Numerical techniques (steady-state and dynamic) were employed in a sequential manner to optimize the system parameters, speeding up the overall design process. The results from both numerical and experimental testbeds show that the encoding/decoding of the optical signal can be achieved at a 10 Gbps data rate with a conventional SOA cascade without serious degradation in the data quality.  相似文献   

6.
A comprehensive theoretical model of an ultrafast all-optical Boolean XOR gate implemented with a semiconductor optical amplifier (SOA)-assisted Sagnac interferometer is presented. The model accounts for the SOA small signal gain, linewidth enhancement factor and carrier lifetime, the switching pulses energy and width and the Sagnac loop asymmetry. By undertaking a detailed numerical simulation, the influence of these key parameters on the metrics that determine the quality of switching is thoroughly investigated and simple design rules are extracted for their proper selection so as to ensure optimum operation. The obtained results are in good agreement with the published experimental measurements and confirm the feasibility of realizing the gate at 10 Gb/s with fairly high performance. The model can be extended for studying more complex all-optical circuits of enhanced functionality in which the XOR gate is the basic building block.  相似文献   

7.
The paper investigates the non-linear behavior of semiconductor optical amplifier with Mach–Zehnder interferometer (SOA-MZI) configuration which makes it to work as a logic gate. The two designs of NOR gate based on SOA-MZI have been verified. The basic principal of both designs are same. The summation of data pulses have been taken and inverted to perform a NOR operation. In the design, the first 3 dB coupler creates a phase difference of π/2 in clock pulse and data pulse while passing through two interferometer arms. The clock and data pulses pass through SOA which attenuates the clock pulse wherever the data pulse is present. After passing through second 3 dB coupler a phase difference of π/2 is again created. Therefore, if the clock pulse is in the same phase will be added and if it is out of phase, will be canceled. The designs have been investigated at different bit-rates to achieve higher extinction ratio (ER), Q-factor and bit-error rate (BER) for different pump currents of SOA.  相似文献   

8.
Lovkesh  Sandeep Singh Gill 《Optik》2011,122(11):978-985
The paper shows the design of all-optical logic gates OR, AND, NOT, NOR, XNOR, XOR at ultra high speed by using SOA. The simulations of all logic gates are obtained by XGM and FWM in SOA at 40 Gb/s and 60 Gb/s. The OR, AND, NOR logic between two data sources are obtained using a pump signal, while another logic XNOR using two data. The NOT, XOR obtained using FWM and XGM combined. Thus realization of these logics at 40 Gb/s and 60 Gb/s will lead revolution growth in optical signal processing for high-speed operation.  相似文献   

9.
We propose and demonstrate all-optical multicasting logic XOR gate for non-return-to-zero differential phase-shift keying (NRZ-DPSK) signals by using non-degenerate four-wave mixing (FWM) in a highly nonlinear fiber (HNLF). Theoretical analysis regarding the operation principle of NRZ-DPSK logic XOR gate is clearly described by deriving an analytical solution under the non-depletion approximation. The NRZ-DPSK logic XOR operation is attributed to the linear relationship of complex amplitudes between converted idlers and input NRZ-DPSK signals. By using three non-degenerate FWM processes in an HNLF, 40 Gbit/s all-optical multicasting logic XOR gate for NRZ-DPSK signals are successfully demonstrated in the experiment.  相似文献   

10.
We present an integrated Silicon-on-Insulator (SOI) based Mach-Zehnder interferometer (MZI) in order to perform ultrafast all-optical XOR logic gate operation with a bit rate of ∼ 0.33 Tb/s. A numerical simulation is carried out in order to study various parameters such as extinction ratio and eye-opening parameters, characterizing the performance of the XOR logic gate. The output XOR logic gate signal can have improved extinction and eye margin if the initial powers of primary signals and the probe continuous-wave (CW), and SOI waveguide length are judiciously adjusted.  相似文献   

11.
The challenges which the CMOS technology is facing toward the end of the technology roadmap calls for an investigation of various logical and technological solutions to CMOS at the nano scale. Two such paradigms which are considered in this paper are the reversible logic and the quantum-dot cellular automata (QCA) nanotechnology. Firstly, a new 3 × 3 reversible and universal gate, RG-QCA, is proposed and implemented in QCA technology using conventional 3-input majority voter based logic. Further the gate is optimized by using explicit interaction of cells and this optimized gate is then used to design an optimized modular full adder in QCA. Another configuration of RG-QCA gate, CRG-QCA, is then proposed which is a 4 × 4 gate and includes the fault tolerant characteristics and parity preserving nature. The proposed CRG-QCA gate is then tested to design a fault tolerant full adder circuit. Extensive comparisons of gate and adder circuits are drawn with the existing literature and it is envisaged that our proposed designs perform better and are cost efficient in QCA technology.  相似文献   

12.
The possibility of implementing an ultrafast all-optical XOR gate using a single semiconductor optical amplifier (SOA)-based ultrafast nonlinear interferometer (UNI) is theoretically investigated and demonstrated. For this purpose a comprehensive model that characterizes the performance of a SOA when it is successively driven by two strong pseudorandom binary sequences is applied to simulate the specific module under dual rail switching mode of operation. In this manner an extensive set of curves is obtained allowing to analyze and evaluate the impact of the input data, SOA and interferometer critical parameters on the fully loaded Q-factor. Their thorough study and interpretation reveals that the satisfaction of their requirements in order to render acceptable this metric is feasible from a technological perspective and thus if their selection is made according to the extracted guidelines then pattern-free and error-free modulo-2 arithmetic can be straightforwardly realized at 20 Gb/s. This prediction can be of practical interest in simplifying and assisting the design of more sophisticated interconnections of enhanced combinatorial and sequential functionality in which the XOR gate is the core logical unit.  相似文献   

13.
A cloud service to offer entropy has been paid much attention to. As one of the entropy sources, a physical random number generator is used as a true random number generator, relying on its irreproducibility. This paper focuses on a physical random number generator using a field-programmable gate array as an entropy source by employing ring oscillator circuits as a representative true random number generator. This paper investigates the effects of an XOR gate in the oscillation circuit by observing the output signal period. It aims to reveal the relationship between inputs and the output through the XOR gate in the target generator. The authors conduct two experiments to consider the relevance. It is confirmed that combining two ring oscillators with an XOR gate increases the complexity of the output cycle. In addition, verification using state transitions showed that the probability of the state transitions was evenly distributed by increasing the number of ring oscillator circuits.  相似文献   

14.
We experimentally and theoretically demonstrate 40 Gb/s all-optical logic NOR and OR gates based on a semiconductor optical amplifier (SOA) and a blue shifted optical bandpass filter (OBF). Two kinds of data formats are discussed, namely return-to-zero (RZ) format and nonreturn-to-zero (NRZ) format. The logic NOR and OR functions of RZ format are realized at the OBF detuning of −0.22 nm and −0.44 nm, respectively. The logic NOR function of NRZ format is realized at the OBF detuning of −0.24 nm. The simulation is in good agreement with the experimental results when the linewidth enhancement factor is 5.5. The simulation also shows that the SOA with large linewidth enhancement factor is preferred to achieve NOR and OR functions with good performance. The input data signal is of good pulsewidth-tolerance for NOR function, whereas not for OR function. The high Q factor could be obtained at narrow pulses injection.  相似文献   

15.
In this article, we propose the realization of XNOR logic function by using all-optical XOR and NOT logic gates. Initially, both XOR and NOT gates are designed, simulated and optimized for high contrast outputs. T-shaped waveguides are created on the photonic crystal platform to realize these logic gates. An extra input is used to perform the inversion operation in the NOT gate. Inputs in both the gates are applied with out of phase so as to have a destructive interference between them and produce negligible intensity for logic ‘0'. The XOR and NOT gates are simulated using Finite Difference Time Domain method which results with a high contrast ratio of 55.23?dB and 54.83?dB, respectively at a response time of 0.136?ps and 0.1256?ps. Later, both the gates are cascaded by superimposing the output branch of the waveguide of XOR gate with the input branch of the waveguide of NOT gate so that it can be resulted with compact size for XNOR logic function. The resultant structure of XNOR logic came out with the contrast ratio of 12.27?dB at a response time of 0.1588?ps. Finally, it can be concluded that the proposed structures with fair output performance can suitably be applied in the design of photonic integrated circuits for high speed computing and telecommunication systems.  相似文献   

16.
We propose a novel ultra-compact all-optical XOR and AND logic gates without using nonlinear optics. In order to realize these devices, we adopt photonic crystal waveguides (PCWs) based on multi-mode interference devices. Numerical results show that the operating bandwidth of the ON to OFF logic-level contrast ratio of not less than 6.79 dB is 35 nm for XOR logic gate and 9 nm for AND logic gate. Proposed logic gates have the potential to be key components for an optical packet switching system due to their small feature sizes and low power consumption.  相似文献   

17.
The 40 Gb/s optical frequency converter for non-return to zero differential phase shift keying (NRZ-DPSK) signal by using four wave mixing in semiconductor optical amplifier (SOA) have achieved sucessfully. The optimized signal-to-pump ratio for NRZ-DPSK by using optimized SOA structure with enhanced FWM effect is also evaluated. The optimum signal-to-pump ratio is 12 dB and 10 dB with Q factor penalty of 0.685 dB and 0.663 dB. The dependence of four wave mixing efficiency and converted signal power on signal input power is studied and it is evaluated that four wave mixing efficiency decreases with increase in the input power. The impact of pump power, signal-to-pump ratio, and SOA parameters with Q factor penalty for 40 Gb/s has been illustrated. It has shown that converted signal power increases up to the saturation power of semiconductor optical amplifier, then decreases. It is observed that for the optimum pump power, OSNR of converted signal varies little with signal input power.  相似文献   

18.
Chang YC  Lin GR 《Optics letters》2005,30(16):2074-2076
An OC-192 optical return-to-zero- (RZ-) formatted OR logic gate is experimentally demonstrated and theoretically interpreted for the first time to our knowledge. It is implemented by using a data format converter based on an optically injection-locked Fabry-Perot laser diode (FPLD) modulated in below-threshold condition. By injecting two non-return-to-zero data streams into the FPLD-based OR gate, a peak-power-equalized RZ-formatted OR logic data stream extinction ratio of >8 dB is obtained from the FPLD with optimized rf-modulating and optical injecting powers of 24.7 and >-4 dBm, respectively. The highest data rate of up to 12.5 Gbits/s with a bit error rate (BER) of 10(-13) at a received optical power of >-16 dBm can be achieved by increasing the dc bias current of the FPLD-based RZ-formatted OR logic gate to 8 mA. The OR-gated RZ data stream exhibits a duty cycle (pulse width) of approximately 27% (27 ps) and a 0.5 dB power penalty at a BER of 10(-9) at a data rate of 9.953 Gbits/s.  相似文献   

19.
All-optical logic gates, including OR, XOR, NOT, XNOR, and NAND gates, are realized theoretically in a two-dimensional silicon photonic crystal using the light beam interference effect. The ingenious photonic crystal waveguide component design, the precisely controlled optical path difference, and the elaborate device configuration ensure the simultaneous realization of five types of logic gate with low-power and a contrast ratio between the logic states of “1” and “0” as high as 20 dB. High power is not necessary for operation of these logic gate devices. This offers a simple and effective approach for the realization of integrated all-optical logic devices.  相似文献   

20.
We investigated 20 channels at 10 Gb/s wavelength division multiplexing (WDM) transmission over 1190 km single mode fiber and dispersion compensating fiber using cascaded inline semiconductor optical amplifier at a span of 70 km for RZ-DPSK (return zero differential phase-shift keying) modulation format by using same channel spacing, i.e. 100 GHz. We show for RZ-OOK (return zero on-off keying) format a transmission distance of up to 1050 km with Q factor more than 15 dB, without any power drops. We developed the SOA model for inline amplifier having minimum cross-talks and ASE (amplified spontaneous emission) noise power with sufficient gain. At optimal bias current of 400 mA, a high constant gain of 36.5 dB is obtained up to a saturation power of 21.36 mW. So reduction of cross-talk and distortion is possible by decreasing the bias current at appropriate amplification factor.The DPSK modulation format has less cross-talk as compared to OOK format for nonlinearities and saturation case. The impact of optical power received and Q factor at different distance for both RZ-OOK and RZ-DPSK modulation format has been illustrated. We have shown the optical spectrum and clear Eye diagram at the transmission distance of 1190 km in RZ-DPSK system and 1050 km in RZ-OOK systems.The bit error rate (BER) for all channels observed is less than 10−10 up to gain saturation for both DPSK and OOK systems. Finally, we investigated that the transmission distance decreases with a decrease in channel spacing of up to 20 GHz.  相似文献   

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