Small-signal subthreshold model for i.g.f.e.t.s

Theoretical considerations supported by practical measurements indicate that the small-signal low-frequency behaviour of i.g.f.e.t.s, operating with a significant VDS bias and 1 nA < ID < 1?A, can be represented by a simple model.     

Injection transistor-transistor logic (i.t.t.l.)

A new circuit is described that comprises a lateral-multiemitter vertical transistor structure and an inverter transistor. The circuit acts as an injection transistor-transistor logic (i.t.t.l.).     

Octave-band GaAs f.e.t. y.i.g.-tuned oscillators

The design of a y.i.g.-tuned f.e.t. oscillator that covers the X-band octave of 6 to 12 GHz is presented. The oscillator uses a compound feedback scheme to generate a negative conductance over the required bandwidth. Excellent agreement is obtained between the computer predictions and the experimental results.     

Simple I/V model for short-channel i.g.f.e.t.s in the triode region

The standard 1-dimensional model for an i.g.f.e.t. in the triode region predicts values of the drain current ID that fall increasingly below experimental values as the channel is shortened or as the drain voltage VD is increased. However, a strictly 2-dimensional treatment results in prohibitive computation. A model is described that takes into account fringing fields at each end of the channel and which requires a relatively simple numerical solution of two nonlinear equations. Experiments on p channel i.g.f.e.t.s with gate lengths of 1.6 to 7.8 ?m show that this model predicts I/V characteristics much better than does the standard 1-dimensional model which includes the bulk charge.     

n-channel inversion-mode InP m.i.s.f.e.t.

Capacitance/voltage and m.i.s.f.e.t. inversion-mode f.e.t. data are reported for p-type InP. It is shown that the surface of this material appears to be inverted at zero gate bias and that good inversion-mode (normally-off) device behaviour is possible.     

GaAs m.a.o.s.f.e.t. memory transistor

A new non-volatile memory device is reported. This device is a GaAs m.o.s.f.e.t. with charge storage in the gate in which is a double oxide structure of aluminium oxide and GaAs native oxide, both oxides are grown anodically. The fabrication of the device is described and the results of initial measurements on the charging and charge retention properties are presented.     

n-channel m.i.s.f.e.t.s in epitaxial HgCdTe/CdTe

M.I.S.F.E.T.s have been fabricated in HgCdTe epitaxially grown on CdTe substrates. These planar n-channel f.e.t.s use ZnS as the insulator and Be ion implantation for the source and drain regions. Surface mobilities of 7×103 cm3/Vs at 77 K are reported.     

Conditions for optimum noise performance in l.f. amplifiers employing junction f.e.t.s

Increasing the drain current of an f.e.t. can result in an improvement of the noise performance at medium frequencies, but, owing to changes in the noise spectrum of the device, a deterioration of the low-frequency noise performance can result. Measurements in the frequency range 1 Hz?1 kHz on some low-noise samples of f.e.t.s show that the drain current is not critical up to a limit, but, above this limit, the noise performance below 10 Hz deteriorates rapidly.     

Low-noise GaAs m.e.s.f.e.t.s

GaAs m.e.s.f.e.t.s with optimum noise figures of 1.6 dB at 6 GHz have been fabricated by projection photolithography. An equation has been developed for the calculation of optimum noise figure which gives good agreement between calculated and measured values.     

Enhancement-mode ion-implanted InP f.e.t.s

Planar enhancement-mode InP f.e.t.s have been fabricated through the use of ion implantation and subsequent electron-beam lithography. Noise figures of 3.2 and 2.6 dB were achieved at 8 GHz with associated gains of 6.4 and 4.7 dB, respectively.     

Microwave gain from an n-channel enhancement-mode InP m.i.s.f.e.t.

A power gain of 14 dB at 1 GHz has been demonstrated in an enhancement-mode m.i.s.f.e.t. constructed on an Fe-doped semi-insulating InP substrate. The same device also exhibits well behaved gain characteristics at low frequencies.     

n-channel formation on semi-insulating InP surface by m.i.s.f.e.t.

InP m.i.s.f.e.t.s using Fe-doped semi-insulating material surface have been fabricated. The devices, composed of sulphur-diffused n-type source and drain and c.v.d. Al2O3 gate insulator, exhibited n-channel normally-off behaviour and a source drain capacitance two orders of magnitude smaller than that of p-InP m.i.s.f.e.t.s with the same dimensions.     

Micrometre-gate m.e.s.f.e.t.s on laser-annealed polysilicon

Schottky-barrier field-effect transistors (m.e.s.f.e.t.s) have been fabricated on uniformly doped laser-annealed polycrystalline silicon deposited on a silicon nitride insulator. The devices, which had aluminium Schottky-barrier gates and diffused n+ sources and drains but nonoptimised channel profiles, had about 65% the gm values of similar but optimised devices made on s.o.s. layers. Performance of these devices is considered adequate for certain innovative integrated-circuit technologies.     

Performance of GaAs power m.e.s.f.e.t.s

Power performance results at 4 GHz are summarised for GaAs m.e.s.f.e.t.s ranging in size from 4 to 16 mm gate periphery. A double-chip 16 mm unit operated at 24 V source-drain bias produced 13.5 W with 3 dB gain and 10.7 W with 8.1 dB gain. Although lack of perfect power and gain scaling is observed, the degradation in output power of the 16 mm devices was only 1 dB compared to the smaller devices.     

Avalanche noise in GaAs m.e.s.f.e.t.s

Instabilities in the d.c. characteristics of GaAs m.e.s.f.e.t.s for drain to source voltages greater than 4 V. believed to be due to reloading of traps in the interface between active layer and bulk material, or gunn-domain formation, seem to have their origin in avalanche breakdown of the back diode under the drain contact. Microplasma switching, vertical to the active layer, strongly modulates the drain current producing large broadband noise power.     

Substrate conduction in GaAs m.e.s.f.e.t.s

Substrate currents in a gateless GaAs m.e.s.f.e.t. have been measured at d.c, 0.9 MHz and 2 GHz. The results are consistent with the assumption of substrate conduction at high frequencies and active-layer conduction alone at low frequencies.     

GaAs f.e.t.s with silicon-implanted channels

Field-effect transistors with channel doping profiles fabricated by the implantation of silicon ions into high-resistivity vapour phase epitaxial GaAs have given noise figures of 2.9 dB with an associated gain of approximately 5 dB at 10 GHz. Similar measurements on F.E.T.S fabricated in an identical manner, except for the channel fabrication, where silicon ions were implanted directly into a Cr-doped semi-insulating GaAs substrate, have resulted in nose figures typically 1 dB higher.     

Performance of sulphur-ion-implanted GaAs f.e.t.s

GaAs f.e.t.s have been produced by sulphur-ion implantation that give optimum noise figures as low as 4.6 dB at 10 GHz and maximum available gains of greater than 10 dB at 10 GHz. A considerable degree of uniformity among the devices is observed.     

Performance of selenium-ion-implanted GaAs f.e.t.s

Selenium-ion-implanted GaAs f.e.t.s have given minimum noise figures as low as 3·4 dB and maximum available gains of at least 10 dB at 10 GHz. The devices do not appear to suffer from short-term drift problems, and have greater device-characteristic uniformity and reproducibility than epitaxial f.e.t.s.     

Computer study of submicrometre f.e.t.s

The electrical properties of f.e.t.s with submicrometre gates are investigated by means of a 2-dimensional computer model. It is found that the gain-bandwidth product increases with decreasing gate length and reaches a value of 70 GHz for 0.1 ?m gates. This improvement is, however, at the expense of open-circuit voltage gain. A practical limit of the gate length for useful devices is found to be about 0.1 ?m.