高迁移率聚合物薄膜晶体管

以高掺杂Si单晶片作为栅电极, 热生长SiO₂作为栅介质层, 聚三己基噻吩薄膜作为半导体活性层, Au作为源、漏电极, 并采用十八烷基三氯硅烷（OTS）对栅介质表面改性, 在空气环境下成功地制备出高性能聚合物薄膜晶体管. 结果表明, 通过采用OTS对栅介质层表面修饰大幅度地改善了聚合物薄膜晶体管的电性能, 器件的场效应迁移率高达0.02 cm²/（Vs）, 开关电流比大于10⁵. 关键词： 聚合物薄膜晶体管 聚三己基噻吩 场效应迁移率 表面修饰     

Bias stress effect in low-voltage organic thin-film transistors

The bias stress effect in pentacene organic thin-film transistors has been investigated. The transistors utilize a thin gate dielectric based on an organic self-assembled monolayer and thus can be operated at low voltages. The bias stress-induced threshold voltage shift has been analyzed for different drain-source voltages. By fitting the time-dependent threshold voltage shift to a stretched exponential function, both the maximum (equilibrium) threshold voltage shift and the time constant of the threshold voltage shift were determined for each drain-source voltage. It was found that both the equilibrium threshold voltage shift and the time constant decrease significantly with increasing drain-source voltage. This suggests that when a drain-source voltage is applied to the transistor during gate bias stress, the tilting of the HOMO and LUMO bands along the channel creates a pathway for the fast release of trapped carriers.     

Organic passivation layers for pentacene organic thin-film transistors

We studied the passivation layers for pentacene organic thin-film transistors (OTFTs) that were used to drive the active-matrix organic-light-emitting-diodes (AMOLEDs) fabricated by inkjet process. Conventional polyvinyl acetate (PVA) passivation layer could not protect OTFT channel from poly(3,4-ethylenedioxythiophene):poly(styrene sulfonic acid) (PEDOT:PSS) inkjet process so that the performance was degraded critically after the process. By applying PVA/PVA/photoacryl (PA) multi-passivation layers, we could get OTFT arrays with switching ratio over 10⁶ even after PEDOT:PSS process. Using these OTFTs, we could drive AMOLEDs made by inkjet process.     

Laser forward transfer of silver electrodes for organic thin-film transistors

Organic thin-film transistors (OTFTs) with top- and bottom-contact configurations were fabricated using silver nano-inks printed by laser forward transfer for the gate and source/drain electrodes with pentacene and poly-4-vinylphenol as the organic semiconductor and dielectric layers, respectively. The volume of the laser-printed Ag pixels was typically in the subpicoliter (0.2–0.4 pl) range. The top-contact OTFTs resulted in lower contact resistance compared to those obtained from the bottom-contact OTFTs, and showed improved overall device performance. The top-contact OTFTs exhibited field-effect mobilities of ∼0.16 cm² V⁻¹ s⁻¹ and on/off current ratios of ∼10⁵.     

Effect of molecular structure on bias stress effect in organic thin-film transistors

Two thiophene-phenylene semiconductors, bis(2-phenylethynyl) end-substituted oligothiophenes (diPhAc-nTs, n = 2, 3), were studied as active layers in organic thin film transistors (OTFTs). Structural and electrical properties of such high vacuum evaporated thin films were compared to pentacene. All three oligomers behave as p-type semiconducting layers into OTFTs. In the same preparation and measurement conditions, diPhAc-3T possesses two of incontrovertible attributes of OTFTs for low cost applications, a high air-stable mobility at low substrate temperature (T_sub), i.e. typically 25 °C together with a reduced bias stress effect compared to the well-known pentacene semiconductor. This study brings to light on the role of the molecular structure involved in the active layer in thin-film devices and describes effects as thin film morphology as important parameters when optimizing the structure of OTFTs.     

Surface modified polymeric gate insulators for pentacene organic thin-film transistors

This paper demonstrates effects of a surface modification of polymeric gate insulators on a performance of organic thin-film transistor (OTFT). Pentacene OTFTs were fabricated with three types of polymer gate insulators—poly(4-vinylphenol) (PVP, G1) with comparably high dielectric constant, polyimide (PI, G2) with n-octadecyl (C₁₈) side chain, which resulted in hydrophobicity and low dielectric constant, and surface modified PVP(G3). The G3 was prepared by a spin-coating the solution of G2 onto the G1 film. We found that the n-octadecyl group of the G3 protruded from the surface and made the PVP surface more hydrophobic. The less polar surface strongly improved the device performance. Subthreshold slope (s.s.) of the OTFT with G3 as the gate insulator decreased significantly to 2.7 V/dec, which was much smaller than that of OTFTs fabricated with G1 (4.0 V/dec). That is, thin layer with fewer C₁₈ group in contact with pentacene induced a good electrical property like lower s.s. Further the higher dielectric constant of the underlying layer resulted in higher mobility of the device. The mobility (0.50 cm² V⁻¹ s⁻¹) of the OTFT with G3 as the gate insulator showed a higher value compared to that (0.25 cm² V⁻¹ s⁻¹) of the OTFT with G2.     

Characteristics of AlGaN/GaN high electron mobility transistors on metallic substrate

We have successfully prepared GaN based high electron mobility transistors(HEMTs)on metallic substrates transferred from silicon substrates by electroplating technique.GaN HEMTs on Cu substrates are demonstrated to basically have the same good electric characteristics as the chips on Si substrates.Furthermore,the better heat dissipation of HEMTs on Cu substrates compared to HEMTs on Si substrates is clearly observed by thermoreflectance imaging,showing the promising potential for very high-power and high-temperature operation.This work shows the outstanding ability of HEMT chips on Cu substrates for solving the self-heating effect with the advantages of process simplicity,high yield,and low production requirement.     

A photosensitive copolymer for the gate insulator of organic thin-film transistors

A novel cross-linkable copolymer for the gate insulators of organic thin-film transistors (OTFTs) was synthesized by free radical copolymerization with methyl methacrylate and ethylene methylacrylate cinnamoylate. Copolymers of molecular weights (Mn: 109200–160000 g mol⁻¹) and polydispersities (1.59–2.24) were characterized by FTIR and NMR. Spin-coated thin films had smooth surfaces with the root-mean-square (RMS) surface roughness of 0.23 nm, 0.41 nm, respectively, before and after UV irradiation. Exposure of the copolymers to UV light produced cross-linking of the polymeric chains that could be confirmed by comparing the FTIR and UV spectra recorded prior and after irradiation. Moreover, the vanadyl-phthalocyanine (VOPc) OTFTs with the photosensitive copolymer as gate insulator were fabricated and found to exhibit a carrier mobility of 0.25 cm²/V s, an on/off ratio of 10⁴.     

Quantitative analysis of charge-carrier trapping in organic thin-film transistors from transfer characteristics

A dynamic method for quantifying the amount and mechanism of trapping in organic field effect transistors (OFETs) is proposed. It exploits transfer characteristics acquired upon application of a triangular waveform gate sweep V _G. The analysis of the transfer characteristics at the turning point V _G=−V _max between forward and backward gate sweeps, viz. around the maximum gate voltage V _max applied, provides a differential slope Δm which depends exclusively on trapping. Upon a systematic change of V _max it is possible to extract the initial threshold voltage, equivalent to one of the observables of conventional stress measurements, and assess the mechanism of trapping via the functional dependence on the current. The analysis of the differential logarithmic derivative at the turning point yields the parameters of trapping, as the exponent β and the time scale of trapping τ. In the case of an ultra-thin pentacene OFET we extract β=1 and τ=10²–10³ s, in agreement with an exponential distribution of traps. The analysis of the hysteresis parameter Δm is completely general and explores time scales much shorter than those involved in bias stress measurements, thus avoiding irreversible damage to the device.     

基于氧化铟锡的无结低电压薄膜晶体管

在室温下制备了基于氧化铟锡(ITO)的底栅结构无结薄膜晶体管. 源漏电极和沟道层都是同样的ITO薄膜材料,没有形成传统的源极结和漏极结, 因而极大的简化了制备流程,降低了工艺成本.使用具有大电容的双电荷层SiO₂作为栅介质, 发现当ITO沟道层的厚度降到约20 nm时, 器件的栅极电压可以很好的调控源漏电流. 这些无结薄膜晶体管具有良好的器件性能: 低工作电压(1.5 V), 小亚阈值摆幅(0.13 V/dec)、 高迁移率(21.56 cm²/V·s)和大开关电流比(1.3× 10⁶). 这些器件即使直接在大气环境中放置4个月, 器件性能也没有明显恶化:亚阈值摆幅保持为0.13 V/dec,迁移率略微下降至18.99 cm²/V·s,开关电流比依然大于10⁶.这种工作电压低、工艺简单、 性能稳定的无结低电压薄膜晶体管非常有希望应用于低能耗便携式电子产品以及新型传感器领域.     

High-performance n-channel organic thin-film transistors based on the dual effects of heterojunction and surface modification

This paper presents two n-channel organic heterojunction transistors with modified insulator by using hexadecafluorophthalocyaninatocopper (F₁₆CuPc)/copper phthalocyanine (CuPc) and F₁₆CuPc/pentacene as the active layers. Compared with a single-layer device, it reports that an improved field-effect mobility and a 6-fold higher drain current are observed. The highest mobility of 0.081~cm²/(V.s) was obtained from F₁₆CuPc/CuPc heterojunction devices. This result is attributed to the dual effects of the organic heterojunction and interface modification. Furthermore, for two heterojunction devices, the performance of the F₁₆CuPc/CuPc-based transistor is better than that of F₁₆CuPc/pentacene. This is attributed to the morphologic match of two organic components.     

Analytic models for organic field-effect transistors based on exponential and power mobility models

The fundamental I–V formula of an organic field effect transistor(OFET) is improved to overcome the divergence of the integrand, so it is very convenient for both numerical calculations and analytic derivations. The analytic I–V formulae are derived based on the exponential mobility model and power-function mobility model, respectively, and the derived analytic formulae are applied to three OFET devices. The results calculated from the reformulated analytic I–V formulae taking in exponential and...     

高迁移率非晶铟镓锌氧化物薄膜晶体管的制备与特性研究

由于铟镓锌氧化物(IGZO) 薄膜具有高迁移率和高透过率的特点, 它作为有源层被广泛的应用于薄膜晶体管(TFT). 本文利用磁控溅射方法制备了TFT的有源层IGZO和源漏电极, 用简单低成本的掩膜法控制沟道的尺寸, 制备了具有高迁移率、底栅结构的n型非晶铟镓锌氧化物薄膜晶体管 (IGZO-TFT). 利用X 射线衍射仪(XRD) 和紫外可见光分光光度计分别测试了IGZO薄膜的衍射图谱和透过率图谱, 研究了IGZO薄膜的结构和光学特性. 通过测试IGZO-TFT的输出特性和转移特性曲线, 讨论了IGZO有源层厚度对IGZO-TFT特性的影响. 制备的IGZO-TFT器件的场效应迁移率高达15.6 cm²·V^-1·s^-1, 开关比高于10⁷. 关键词： 非晶铟镓锌氧化物 薄膜晶体管 有源层     

Tuning the contact resistance in organic thin-film transistors with an organic-inorganic hybrid interlayer

We demonstrated the tunable contact resistance in pentacene thin film transistor (TFT) by inserting an organic-inorganic hybrid interlayer between Au electrode and pentacene layer. The contact resistance of pentacene-TFT varies with concentration of pentacene-TFT varies with concentration of MoO_x in organic-inorganic hybrid interlayer. MoO_x in organic-inorganic hybrid interlayer. The contact resistance of the device with 55 wt% MoO_x doped pentacene interlayer is about 7.8 times smaller than that of device without interlayer at the gate voltage of −20 V. Comparing the properties of pentacene-TFT without interlayer, the performance of the pentacene-TFT with 55 wt% MoO_x doped pentacene was significantly improved: saturation mobility increased from 0.39 to 0.87 cm²/V s, threshold voltage reduced from −21.3 to −7.2 V, and threshold swing varied from 3.75 to 1.39 V/dec. Our results indicated that the organic-inorganic hybrid interlayer is an effective way to improve the performance of p-channel OTFTs.     

溶胶凝胶法制备以HfO2为绝缘层和ZITO为有源层的高迁移率薄膜晶体管

采用溶胶凝胶法制备了h-k氧化铪HfO₂薄膜, 经500℃退火后, 获得了高透过率、表面光滑、低漏电流和相对高介电常数的HfO₂薄膜. 并采用氧化铪作为绝缘层和锌铟锡氧化物作为有源层成功地制备了底栅顶接触结构薄膜晶体管器件. 获得的薄膜晶体管器件的饱和迁移率大于100 cm²·V^-1·s^-1, 阈值电压为-0.5 V, 开关比为5×10⁶, 亚阈值摆幅为105 mV/decade. 表明采用溶胶凝胶制备的薄膜晶体管具备高的迁移率, 其迁移率接近低温多晶硅薄膜晶体管的迁移率.     

Spatially resolved photoresponse measurements on pentacene thin-film transistors

A confocal setup with a spatial resolution in the submicron regime is employed for investigating the response of pentacene transistors to local illumination. The transistors show enhanced and inhomogeneous photoresponse in the proximity of the hole-injecting contact. These inhomogeneities represent contact areas of varying injection efficiency. Thus, this technique allows imaging of contact efficiencies with submicron resolution over large areas up to hundreds of microns. Drift–diffusion simulations including a photogeneration/recombination process have been performed to model the photoresponse. The simulations illustrate that the potential drop along the channel is dramatically reduced in the illuminated area due to photoconductance (i.e. photoinjection of excitons and subsequent dissociation). Also, the injection barrier for holes is reduced if the illumination is close to the hole-injecting electrode. The rapid decay of the photoresponse with increasing distance to the positively biased electrode is caused by the limited electron mean free path in our devices.     

Enhanced electrical properties of pentacene-based organic thin-film transistors by modifying the gate insulator surface

A reliable surface treatment for the pentacene/gate dielectric interface was developed to enhance the electrical transport properties of organic thin-film transistors (OTFTs). Plasma-polymerized fluorocarbon (CFx) film was deposited onto the SiO₂ gate dielectric prior to pentacene deposition, resulting in a dramatic increase of the field-effect mobility from 0.015 cm²/(V s) to 0.22 cm²/(V s), and a threshold voltage reduction from −14.0 V to −9.9 V. The observed carrier mobility increase by a factor of 10 in the resulting OTFTs is associated with various growth behaviors of polycrystalline pentacene thin films on different substrates, where a pronounced morphological change occurs in the first few molecular layers but the similar morphologies in the upper layers. The accompanying threshold voltage variation suggests that hole accumulation in the conduction channel-induced weak charge transfer between pentacene and CFx.     

一步掩膜法制备超低压ITO沟道纸上薄膜晶体管

基于一步掩模法工艺制备了一种新型的纸上双电荷层超低压薄膜晶体管. 在室温射频磁控溅射过程中, 仅仅利用一块镍掩模板, 就可同时沉积出氧化铟锡(ITO)源漏电极和ITO沟道. 在此基础上, 以等离子体增强化学气相沉积法(PECVD)合成的具有双电荷层效应的微孔SiO₂为栅介质, 成功制备出以纸为衬底的超低压氧化物薄膜晶体管. 这种晶体管显示出极好的性能: 超低的工作电压1.5 V, 场效应迁移率为20.1 cm²/Vs, 亚阈值斜率为188 mV/decade, 开关电流比为5× 10⁵. 这种基于全室温一步掩模法工艺制备的纸上氧化物薄膜晶体管具有工作电压低, 工艺简单, 成本低廉等优点, 非常有望应用于未来便携式低功耗电子产品的制造中.