Nitric acid oxidation of Si (NAOS) method for low temperature fabrication of SiO2/Si and SiO2/SiC structures

We have developed low temperature formation methods of SiO₂/Si and SiO₂/SiC structures by use of nitric acid, i.e., nitric acid oxidation of Si (or SiC) (NAOS) methods. By use of the azeotropic NAOS method (i.e., immersion in 68 wt% HNO₃ aqueous solutions at 120 °C), an ultrathin (i.e., 1.3-1.4 nm) SiO₂ layer with a low leakage current density can be formed on Si. The leakage current density can be further decreased by post-metallization anneal (PMA) at 200 °C in hydrogen atmosphere, and consequently the leakage current density at the gate bias voltage of 1 V becomes 1/4-1/20 of that of an ultrathin (i.e., 1.5 nm) thermal oxide layer usually formed at temperatures between 800 and 900 °C. The low leakage current density is attributable to (i) low interface state density, (ii) low SiO₂ gap-state density, and (iii) high band discontinuity energy at the SiO₂/Si interface arising from the high atomic density of the NAOS SiO₂ layer.For the formation of a relatively thick (i.e., ≥10 nm) SiO₂ layer, we have developed the two-step NAOS method in which the initial and subsequent oxidation is performed by immersion in ∼40 wt% HNO₃ and azeotropic HNO₃ aqueous solutions, respectively. In this case, the SiO₂ formation rate does not depend on the Si surface orientation. Using the two-step NAOS method, a uniform thickness SiO₂ layer can be formed even on the rough surface of poly-crystalline Si thin films. The atomic density of the two-step NAOS SiO₂ layer is slightly higher than that for thermal oxide. When PMA at 250 °C in hydrogen is performed on the two-step NAOS SiO₂ layer, the current-voltage and capacitance-voltage characteristics become as good as those for thermal oxide formed at 900 °C.A relatively thick (i.e., ≥10 nm) SiO₂ layer can also be formed on SiC at 120 °C by use of the two-step NAOS method. With no treatment before the NAOS method, the leakage current density is very high, but by heat treatment at 400 °C in pure hydrogen, the leakage current density is decreased by approximately seven orders of magnitude. The hydrogen treatment greatly smoothens the SiC surface, and the subsequent NAOS method results in the formation of an atomically smooth SiO₂/SiC interface and a uniform thickness SiO₂.     

Formation of 10-30 nm SiO2/Si structure with a uniform thickness at ∼120 °C by nitric acid oxidation method

Silicon dioxide (SiO₂) layers with a thickness more than 10 nm can be formed at ∼120 °C by direct Si oxidation with nitric acid (HNO₃). Si is initially immersed in 40 wt.% HNO₃ at the boiling temperature of 108 °C, which forms a ∼1 nm SiO₂ layer, and the immersion is continued after reaching the azeotropic point (i.e., 68 wt.% HNO₃ at 121 °C), resulting in an increase in the SiO₂ thickness. The nitric acid oxidation rates are the same for (1 1 1) and (1 0 0) orientations, and n-type and p-type Si wafers. The oxidation rate is constant at least up to 15 nm SiO₂ thickness (i.e., 1.5 nm/h for single crystalline Si and 3.4 nm/h for polycrystalline Si (poly-Si)), indicating that the interfacial reaction is the rate-determining step. SiO₂ layers with a uniform thickness are formed even on a rough surface of poly-Si thin film.     

Formation of atomically smooth SiO2/SiC interfaces at ∼120 °C by use of nitric acid oxidation method

Conventional thermal oxidation of SiC requires heating at ∼1100 °C. In the present study, we have developed a method of oxidizing SiC at low temperatures (i.e., ∼120 °C) to form relatively thick silicon dioxide (SiO₂) layers by use of nitric acid. When 4H-SiC(0 0 0 1) wafers are immersed in 40 wt% HNO₃ at the boiling temperature of 108 °C and the boiling is kept for 5 h after reaching the azeotropic point (i.e., 68 wt% HNO₃ at 121 °C), 8.1 nm thick SiO₂ layers are formed on the SiC substrates. High resolution transmission electron microscopy measurements show that the SiO₂/SiC interface is atomically flat and the SiO₂ layer is uniform without bunching. When SiC is immersed in an azeotropic mixture of HNO₃ with water from the first, the SiO₂ thickness is less than 0.3 nm. The metal-oxide-semiconductor (MOS) diodes with the SiO₂ layer formed by the nitric acid oxidation method possess a considerably low leakage current density.     

Nitric acid oxidation method to form SiO2/3C-SiC structure at 120 °C

3C-SiC(0 0 1) surfaces are considerably rough with the roughness root mean square value (R_ms) of 1.3 nm, but the surfaces become considerably smooth (i.e., R_ms of 0.5 nm) by heat treatment in pure hydrogen at 400 °C. Two-step nitric acid (HNO₃) oxidation (i.e., immersion in ∼40 wt% HNO₃ followed by that in 68 wt% HNO₃) performed after the hydrogen treatment can oxidize 3C-SiC at extremely low temperature of ∼120 °C, forming thick SiO₂ (e.g., 21 nm) layers. With no hydrogen treatment, the leakage current density of the 〈Al/SiO₂/3C-SiC〉 metal-oxide-semiconductor (MOS) diodes is high, while that for the MOS diodes with the hydrogen treatment is considerably low (e.g., ∼10⁻⁶ A/cm² at the forward gate bias of 1 V) due to the formation of uniform thickness SiO₂ layers. The MOS diodes with the hydrogen treatment show capacitance-voltage curves with accumulation, depletion, and deep-depletion characteristics.     

Band alignment of SiO2/Si structure formed with nitric acid vapor below 500 °C

A relatively thick (i.e., ∼9 nm) SiO₂ layer can be formed by oxidation of Si with nitric acid (HNO₃) vapor below 500 °C. In spite of the low temperature formation, the leakage current density flowing through the SiO₂ layer is considerably low, and it follows the Fowler-Nordheim mechanism. From the Fowler-Nordheim plots, the conduction band offset energy at the SiO₂/Si interface is determined to be 2.57 and 2.21 eV for HNO₃ vapor oxidation at 500 and 350 °C, respectively. From X-ray photoelectron spectroscopy measurements, the valence band offset energy is estimated to be 4.80 and 4.48 eV, respectively, for 500 and 350 °C oxidation. The band-gap energy of the SiO₂ layer formed at 500 °C (8.39 eV) is 0.68 eV larger than that formed at 350 °C. The higher band-gap energy for 500 °C oxidation is mainly attributable to the higher atomic density of the SiO₂ layer of 2.46 × 10²²/cm³. Another reason may be the absence of SiO₂ trap-states.     

Low temperature fabrication of 5-10 nm SiO2/Si structure using advanced nitric acid oxidation of silicon (NAOS) method

We have developed the advanced nitric acid oxidation of Si (NAOS) method to form relatively thick (5-10 nm) SiO₂/Si structure with good electrical characteristics. This method simply involves immersion of Si in 68 wt% nitric acid aqueous solutions at 120 °C with polysilazane films. Fourier transform infrared absorption (FT-IR) measurements show that the atomic density of the NAOS SiO₂ layer is considerably high even without post-oxidation anneal (POA), i.e., 2.28 × 10²² atoms/cm², and it increases by POA at 400 °C in wet-oxygen (2.32 × 10²² atoms/cm²) or dry-oxygen (2.30 × 10²² atoms/cm²). The leakage current density is considerably low (e.g., 10⁻⁵ A/cm² at 8 MV/cm) and it is greatly decreased (10⁻⁸ A/cm² at 8 MV/cm) by POA at 400 °C in wet-oxygen. POA in wet-oxygen increases the atomic density of the SiO₂ layer, and decreases the density of oxide fixed positive charges.     

On ultra-thin oxide/Si and very-thin oxide/Si structures prepared by wet chemical process

The properties of ultra-thin oxide/Si and very-thin oxide/Si structures prepared by wet chemical oxidation in nitric acid aqueous solutions (NAOS) and passivated in HCN aqueous solutions were investigated by electrical, optical and structural methods. n- and p-doped (1 0 0) crystalline Si substrates were used. There were identified more types of interface defect states in dependence on both post-oxidation treatment and passivation procedure. On samples prepared on n-type Si, continuous spectrum of defect states of 0.05-0.2 eV range and discrete defect traps, ∼E_CB − 0.26 eV and ∼E_CB − 0.39 eV, were found. All mentioned defects are related with various types of Si dangling bonds and/or with SiO_x precipitates. Post-metallization annealing of investigated MOS structures reduced the interface defect density and suppressed the leakage currents. It did not change spectral profile of interface defect states in the Si band gap. In addition, there are presented following two optical phenomena: relation between amplitude of photoluminescence signal of NAOS samples and parameters of chemical oxidation process and quantum confinement effect observed on samples containing Si grains of size less as ∼2 nm.     

Nitric acid method for fabrication of gate oxides in TFT

We have developed low temperature formation methods of SiO₂ layers which are applicable to gate oxide layers in thin film transistors (TFT) by use of nitric acid (HNO₃). Thick (>10 nm) SiO₂ layers with good thickness uniformity (i.e., ±4%) can be formed on 32 cm × 40 cm substrates by the two-step nitric acid oxidation method in which initial and subsequent oxidation is performed using 40 and 68 wt% (azeotropic mixture) HNO₃ aqueous solutions, respectively. The nitric acid oxidation of polycrystalline Si (poly-Si) thin films greatly decreases the height of ridge structure present on the poly-Si surfaces. When poly-Si thin films on 32 cm × 40 cm glass substrates are oxidized at azeotropic point (i.e., 68 wt% HNO₃ aqueous solutions at 121 °C), ultrathin (i.e., 1.1 nm) SiO₂ layers with a good thickness uniformity (±0.05 nm) are formed on the poly-Si surfaces. When SiO₂/Si structure fabricated using plasma-enhanced chemical vapor deposition is immersed in 68 wt% HNO₃, oxide fixed charge density is greatly decreased, and interface states are eliminated. The fixed charge density is further decreased by heat treatments at 200 °C, and consequently, capacitance-voltage characteristics which are as good as those of thermal SiO₂/Si structure are achieved.     

Effect of laser annealing on crystallinity of the Si layers in Si/SiO2 multiple quantum wells

We report on continuous-wave laser induced crystallisation processes occurring in Si/SiO₂ multiple quantum wells (MQW), prepared by remote plasma enhanced chemical vapour deposition of amorphous Si and SiO₂ layers on quartz substrates. The size and the volume fraction of the Si nanocrystals in the layers were estimated employing micro-Raman spectroscopy. It was found that several processes occur in the Si/SiO₂ MQW system upon laser treatment, i.e. amorphous to nanocrystalline conversion, Si oxidation and dissolution of the nanocrystals. The speed of these processes depends on laser power density and the wavelength, as well as on the thickness of Si-rich layers. At optimal laser annealing conditions, it was possible to achieve ∼100% crystallinity for 3, 5 and 10 nm thickness of deposited amorphous Si layers. Crystallization induced variation of the light absorption in the layers can explain the complicated process of Si nanocrystals formation during the laser treatment.     

Photoluminescence of Si from Si nanocrystal-doped SiO2/Si multilayered sample

A multilayered Si nanocrystal-doped SiO₂/Si (or Si-nc:SiO₂/Si) sample structure is studied to acquire strong photoluminescence (PL) emission of Si via modulating excess Si concentration. The Si-nc:SiO₂ results from SiO thin film after thermal annealing. The total thickness of SiO layer remains 150 nm, and is partitioned equally into a number of sublayers (N = 3, 5, 10, or 30) by Si interlayers. For each N-layered sample, a maximal PL intensity of Si can be obtained via optimizing the thickness of Si interlayer (or d_Si). This maximal PL intensity varies with N, but the ratio of Si to O is nearly a constant. The brightest sample is found to be that of N = 10 and d_Si = 1 nm, whose PL intensity is ∼5 times that of N = 1 without additional Si doping, and ∼2.5 times that of Si-nc:SiO₂ prepared by co-evaporating of SiO and Si at the same optimized ratio of Si to O. Discussions are made based on PL, TEM, EDX and reflectance measurements.     

BiFeO3/Zn1−xMnxO bilayered thin films

BiFeO₃/Zn_1−xMn_xO (x = 0-0.08) bilayered thin films were deposited on the SrRuO₃/Pt/TiO₂/SiO₂/Si(1 0 0) substrates by radio frequency sputtering. A highly (1 1 0) orientation was induced for BiFeO₃/Zn_1−xMn_xO. BiFeO₃/Zn_1−xMn_xO thin films demonstrate diode-like and resistive hysteresis behavior. A remanent polarization in the range of 2P_r ∼ 121.0-130.6 μC/cm² was measured for BiFeO₃/Zn_1−xMn_xO. BiFeO₃/Zn_1−xMn_xO (x = 0.04) bilayer exhibits a highest M_s value of ∼15.2 emu/cm³, owing to the presence of the magnetic Zn_0.96Mn_0.04O layer with an enhanced M_s value.     

Microstructures and multiferroic properties of textured Bi0.8La0.2FeO3 thin films

La-substituted BiFeO₃, Bi_0.8La_0.2FeO₃, thin films were fabricated on Pt/Ti/SiO₂/Si substrates by pulsed laser deposition. X-ray diffraction and high-resolution transmission electron microscope were used to analyze the structures of the films. The results show the films fabricated under optimized growth condition are (0 1 2) textured. X-ray photoemission spectroscopy results indicate that the oxidation state of Fe ion is Fe³⁺ in the films without detectable Fe²⁺. The films show low leakage current and excellent dielectric characters. Multiferroic properties with a remnant ferroelectric polarization of 5.2 μC/cm² and a remanent magnetization of 0.02 μ_B/Fe were established. These results have some implications for further research.     

The electrical properties of dielectric stacks of SiO2 and Al2O3 prepared by atomic layer deposition method

We produced dielectric stacks composed of ALD SiO₂ and ALD Al₂O₃, such as SiO₂/Al₂O₃, Al₂O₃/SiO₂, and SiO₂/Al₂O₃/SiO₂, and measured the leakage currents through the stacks in comparison with those of the single oxide layers. SiO₂/Al₂O₃ shows lowest leakage current for negative bias region below 6.4 V, and Al₂O₃/SiO₂ showed highest current under negative biases below 4.5 V. Two distinct electron conduction regimes are observed for Al₂O₃ and SiO₂/Al₂O₃. Poole-Frenkel emission is dominant at the high-voltage regime for both dielectrics, whereas the direct tunneling through the dielectric is dominant at the low-voltage regime. The calculated transition voltage between two regimes for SiO₂ (6.5 nm)/Al₂O₃ (12.6 nm) is −6.4 V, which agrees well with the experimental observation (−6.1 V). For the same EOT of entire dielectric stack, the transition voltage between two regimes decreases with thinner SiO₂ layer.     

Effects of co-substitution on the electrical properties of BiFeO3 thin films prepared by chemical solution deposition

Ferroelectric BiFeO₃ thin films with Nd-Cr (or Sm-Cr) co-substitution (denoted by BNdFCr and BSmFCr, respectively) were deposited on the Pt(2 0 0)/TiO₂/SiO₂/Si(1 0 0) substrates by a chemical solution deposition method. X-ray diffraction patterns revealed the formation of BNdFCr and BSmFCr thin films without any secondary phases. The co-substituted BNdFCr (or BSmFCr) thin films, which were annealed at 550 °C for 30 min in N₂ atmosphere, exhibited enhanced electrical properties compared to BFO thin films with the remanent polarization (2P_r) and coercive electric field (2E_c) of 196, 188 μC/cm² and 600, 570 kV/cm with the electric field of 800 kV/cm, respectively. The leakage current densities of BNdFCr and BSmFCr thin films measured at room temperature were approximately three orders of magnitude lower than that of BFO thin film, and the leakage current at room temperature of the thin films exhibited three distinctive conduction behaviors. Furthermore, the values of pulse polarizations [i.e., +(P*-P^{^}) or −(P*-P^{^})] of BNdFCr and BSmFCr thin films were reasonably unchanged up to 1.4 × 10¹⁰ switching cycles.     

Reduced dielectric loss and leakage current in CaCu3Ti4O12/SiO2/CaCu3Ti4O12 multilayered films

The CaCu₃Ti₄O₁₂/SiO₂/CaCu₃Ti₄O₁₂ (CCTO/SiO₂/CCTO) multilayered films were prepared on Pt/Ti/SiO₂/Si substrates by pulsed laser deposition method. It has been demonstrated that the dielectric loss and the leakage current density were significantly reduced with the increase of the SiO₂ layer thickness, accompanied with a decrease of the dielectric constant. The CCTO film with a 20 nm SiO₂ layer showed a dielectric loss of 0.065 at 100 kHz and the leakage current density of 6×10⁻⁷ A/cm² at 100 kV/cm, which were much lower than those of the single layer CCTO films. The improvement of the electric properties is ascribed to two reasons: one is the improved crystallinity; the other is the reduced free carriers in the multilayered films.     

Experimental and theoretical studies of Si-CN bonds to eliminate interface states at Si/SiO2 interface

Cyanide treatment, which includes the immersion of Si in KCN solutions followed by a rinse, effectively passivates interface states at Si/SiO₂ interfaces by the reaction of CN⁻ ions with interface states to form Si-CN bonds. X-ray photoelectron spectroscopy (XPS) measurements show that the concentration of the CN species in the surface region after the cyanide treatment is ∼0.25 at.%. Take-off angle-dependent measurements of the XPS spectra indicate that the concentration of the CN species increases with the depth from the Si/SiO₂ interface at least up to ∼2 nm when ultrathin SiO₂ layers are formed at 450 °C after the cyanide treatment. When the cyanide treatment is applied to metal-oxide-semiconductor (MOS) solar cells with 〈ITO/SiO₂/n-Si〉 structure, the photovoltage greatly increases, leading to a high conversion efficiency of 16.2% in spite of the simple cell structure with no pn-junction. Si-CN bonds are not ruptured by air mass 1.5 100 mW cm⁻² irradiation for 1000 h, and consequently the solar cells show no degradation. Neither are Si-CN bonds broken by heat treatment at 800 °C performed after the cyanide treatment. The thermal and irradiation stability of the cyanide treatment is attributable to strong Si-CN bonds, whose bond energy is calculated to be 1 eV higher than that of the Si-H bond energy using a density functional method.     

Dipole formation and electrical properties of high-k/SiO2 interface according to the density of SiO2 interfacial layer

The effect of SiO₂ buffer layers with various atomic densities on the interface dipole of high-k/SiO₂ is confirmed. An ultrathin SiO₂ layer is formed on Si using the plasma-enhanced chemical vapor deposition (PECVD), H₂O₂ oxidation and nitric acid oxidation (NAOS). The atomic density ratio between the SiO₂ layer with various methods and the high-k is calculated respectively. As the oxygen density of the SiO₂ increased, the amount of the dipole and the flatband voltage (V_FB) shift decreased. Furthermore, leakage current density of the H₂O₂ (0.9 × 10⁻² A/cm²) due to the formation of low-density SiO₂, decreases by approximately six orders of magnitude when SiO₂ buffer layer is inserted using the NAOS (5.13 × 10^-8 A/cm²). Consequently, it is demonstrated that the dipoles that affects the V_FB shift is formed by the diffusion of oxygen ions between the high-k and SiO₂ interface, which has a significant effect of the MOS capacitor.     

Structural and electrical properties of (Na0.85K0.15)0.5Bi0.5TiO3 thin films deposited on LaNiO3 and Pt bottom electrodes

(Na_0.85K_0.15)_0.5Bi_0.5TiO₃ thin films were deposited on LaNiO₃(LNO)/SiO₂/Si(1 0 0) and Pt/Ti/SiO₂/Si(1 0 0) substrates by metal-organic decomposition, and the effects of bottom electrodes LNO and Pt on the ferroelectric, dielectric and piezoelectric properties were investigated by ferroelectric tester, impedance analyzer and scanning probe microscopy, respectively. For the thin films deposited on LNO and Pt electrodes, the remnant polarization 2P_r are about 22.6 and 8.8 μC/cm² under 375 kV/cm, the dielectric constants 238 and 579 at 10 kHz, the dielectric losses 0.06 and 0.30 at 10 kHz, the statistic d_33eff values 95 and 81 pm/V. The improved piezoelectric properties could make (Na_1−xK_x)_0.5Bi_0.5TiO₃ thin film as a promising candidate for piezoelectric thin film devices.     

Fabrication and characterization of La-doped HfO2 gate dielectrics by metal-organic chemical vapor deposition

La-doped HfO₂ gate dielectric thin films have been deposited on Si substrates using La(acac)₃ and Hf(acac)₄ (acac = 2,4-pentanedionate) mixing sources by low-pressure metal-organic chemical vapor deposition (MOCVD). The structure, thermal stability, and electrical properties of La-doped HfO₂ films have been investigated. Inductive coupled plasma analyses confirm that the La content ranging from 1 to 5 mol% is involved in the films. The films show smaller roughness of ∼0.5 nm and improved thermal stability up to 750 °C. The La-doped HfO₂ films on Pt-coated Si and fused quartz substrates have an intrinsic dielectric constant of ∼28 at 1 MHz and a band gap of 5.6 eV, respectively. X-ray photoelectron spectroscopy analyses reveal that the interfacial layer is Hf-based silicate. The reliable value of equivalent oxide thickness (EOT) around 1.2 nm has been obtained, but with a large leakage current density of 3 A/cm² at V_g = 1V + V_fb. MOCVD-derived La-doped HfO₂ is demonstrated to be a potential high-k gate dielectric film for next generation metal oxide semiconductor field effect transistor applications.     

An XPS study and electrical properties of Pb1.1Zr0.53Ti0.47O3/PbO/Si (MFIS) structures according to the substrate temperature of the PbO buffer layer

PbO and PZT thin films were deposited on the p-type (1 0 0) Si substrate by the rf magnetron sputtering method with PbO and Pb_1.1Zr_0.53Ti_0.47O₃ targets for the application of the metal-ferroelectric-insulator-semiconductor (MFIS) structure. The MFIS structures with the PbO buffer layer show the good electric properties including a high memory window and a low leakage current density. The maximum value of the memory window is 2.0 V under the applied voltage of 9 V for the Pt/PZT (200 nm, 400 °C)/PbO (80 nm)/Si structures with the PbO buffer layer deposited at the substrate temperature of 300 °C. From the X-ray photoelectron spectroscopy (XPS) results, we could confirm that the substrate temperature of PbO affects the chemical states of the interface between the PbO buffer layer and Si substrate, which results in the inter-diffusion of Pb and the formation of the intermediate phases (PbSiO₃). And the existence of the undesired SiO₂ layer, which is the low dielectric layer, was confirmed at the surface region of the Si substrate by the XPS depth profile analysis.