Si衬底上InP纳米线的晶体结构和光学性质

采用金属有机化学气相沉积技术,利用自催化法,在Si(100)、(111)衬底上成功生长了InP纳米线。利用扫描电镜观察样品表面,在Si(100)、(111)衬底上生长的纳米线形貌相似,纳米线面密度不同。利用X射线衍射和透射电镜研究纳米线的生长取向和晶体结构,结果显示纳米线具有闪锌矿结构,生长方向〈111〉,并且具有层状孪晶结构。与InP体材料相比,纳米线的光致发光峰位蓝移,半峰全宽增大,拉曼散射TO和LO峰向低波数频移,频移随激发光功率减弱而减小。     

Growth of isotopically enriched Si nanowires

The isotopically enriched silicon (²⁸Si) nanowires have been fabricated by using the floating-zone (FZ) melting vapour method. The growth of the nanowires was performed in the top area, 1.52 cm from the floating melting zone (2 mm width) of a raw material bar under a flow of Ar gas. Field emission scanning electron microscopy and transmission electron microscopy analyses revealed that the nanowires of isotopically enriched ²⁸Si crystalline had diameters ranging from 2050 nm and lengths of several hundreds of micrometres. The special structure of the tip of the isotopically enriched ²⁸Si nanowires was observed.     

Unidirectional hexagonal rare-earth disilicide nanowires on vicinal Si(100)-2×1

Rare-earth disilicide nanowires grown on vicinal Si(100) with a miscut of 2–2.5° toward the [110] azimuth at 600 °C were studied by scanning tunneling microscopy and compared with those grown on flat Si(001). In contrast to rare-earth disilicide nanowires grown on flat Si(100) surfaces, the nanowires grow unidirectionally along the [01̄1] direction of the vicinal Si(100) surface. Rare-earth disilicide nanowires form bundles composed of single nanowire units on both flat and vicinal surfaces. Yet, on the vicinal surface, the bundle width is comparable to the width of the terrace. The average nanowire length on the vicinal substrate is longer than that on the flat substrate. Scanning tunneling spectroscopy shows that the rare-earth disilicide nanowires have metallic properties. PACS 81.07.Vb; 81.16.Dn; 68.65.La; 68.37.Ef     

Formation of silicon oxide nanowires directly from Au/Si and Pd–Au/Si substrates

Amorphous silicon oxide (SiO_x) nanowires were directly grown by thermal processing of Si substrates. Au and Pd–Au thin films with thicknesses of 3 nm deposited on Si (0 0 1) substrates were used as catalysts for the growth of nanowires. High-yield synthesis of SiO_x nanowires was achieved by a simple heating process (1000–1150 °C) in an Ar ambient atmosphere without introducing any additional Si source materials. The as-synthesized products were characterized by field-emission scanning electron microscopy, energy-dispersive X-ray spectroscopy, and transmission electron microscopy measurements. The SiO_x nanowires with lengths of a few and tens of micrometers had an amorphous crystal structure. The solid–liquid–solid model of nanowire formation was shown to be valid.     

Synthesis of epitaxial Si(100) nanowires on Si(100) substrate using vapor–liquid–solid growth in anodic aluminum oxide nanopore arrays

The synthesis of epitaxial Si nanowires with growth direction parallel to Si [100] on Si(100) substrate was demonstrated using a combination of anodic aluminum oxide (AAO) template, catalytic gold film sandwiched between the template and the Si(100) substrate and vapor-liquid-solid growth using SiH₄ as the Si source. After growing out from the AAO nanopores, most Si nanowires changed their diameter and growth direction into larger diameter and 〈111〉 direction. PACS 81.07.-b; 82.45.Cc     

Thermal conductivity of VLS-grown rough Si nanowires with various surface roughnesses and diameters

In this paper, we synthesize VLS-grown rough Si nanowires using Mn as a catalyst with various surface roughnesses and diameters and measured their thermal conductivities. We grew the nanowires by a combination vapor-liquid-solid and vapor-solid mechanism for longitudinal and radial growth, respectively. The surface roughness was controlled from smooth up to about 37 nm by the radial growth. Our measurements showed that the thermal conductivity of rough surface Si nanowires is significantly lower than that of smooth surface nanowires and decreased with increasing surface roughness even though the diameter of the smooth nanowire was lower than that of the rough nanowires. Considering both nanowires were grown via the same growth mechanism, these outcomes clearly demonstrate that the rough surface induces phonon scattering and reduces thermal conductivity with this nanoscale-hole-free nanowires. Control of roughness induced phonon scattering in Si nanowires holds promise for novel thermoelectric devices with high figures of merit.     

硅(001)图形衬底上锗硅纳米线的定位生长

纳米线的定位生长是实现纳米线量子器件寻址和集成的前提.结合自上而下的纳米加工和自下而上的自组装技术,通过分子束外延生长方法,在具有周期性凹槽结构的硅(001)图形衬底上首先低温生长硅锗薄膜然后升温退火,实现了有序锗硅纳米线在凹槽中的定位生长,锗硅纳米线的表面晶面为(105)晶面.详细研究了退火温度、硅锗的比例及图形周期对纳米线形成与否,以及纳米线尺寸的影响.     

Silicon nanowires grown from Au-coated Si substrate

Amorphous Si nanowires were grown on an Au-coated Si substrate by heat treatment at 1000 °C under an H₂ atmosphere. The nanowires have a length of several tens of a micron and a diameter of 10–20 nm. The growth mechanism of the nanowires was investigated and explained with a solid–liquid–solid model. Received: 11 July 2002 / Accepted: 7 July 2002 / Published online: 4 December 2002 RID="*" ID="*"Corresponding author. Fax: +86/10-62751615, E-mail: yudp@pku.edu.cn     

Structural evolution of self‐assisted GaAs nanowires grown on Si(111)

GaAs nanowires are grown on Si(111) by self‐assisted molecular beam epitaxy, and the ratio between wurtzite and zinc‐blende phases is determined as function of nanowire length using asymmetric X‐ray diffraction. We show that under the applied growth conditions, nanowires grow in both phases during the initial stage of growth, whereas the zinc‐blende content increases with growth time and dominates in long nanowires. Compared to the zinc‐blende units, the vertical lattice parameter of the wurtzite segments is 0.7% larger, as measured by the positions of respective diffraction peaks. (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Structure evolution and electrical transport property of Si nanowire

Various optimized Si and its alloy nanowires, from a monoatomic chain to helical and multishell coaxial cylinder, have been obtained. Results reveal that the structure of the Si nanowires transforms as the radii of the carbon nanotubes increase, despite of the chirality of the CNTs. We also calculate the physical properties, such as density of states, transmission functions, current–voltage (I–V) characteristics, and conductance spectra (G–V) of optimized nanowires and alloy nanowires sandwiched between two gold contacts. Interestingly, compared with the pure Si nanowires, the conductance of the alloy nanowires is even lower.     

Morphology evolution of Si nanowires synthesized by gas condensation of SiO without any catalyst

A series of Si nanowires are synthesized at constant temperature of 970 ^○C on Si substrate by gas condensation of pure SiO vapor without any metal catalysts, by controlling the coverage of SiO_x deposits. The morphologies are characterized by scan electron microscopy (SEM) and their evolution during the growth process is observed: from isolated clusters in earlier stage to linked cluster assemblies, and developing to smooth nanowires in the later stage. The growth mechanism is discussed based on the newly proposed clustering-aggregation-sintering model.     

Ytterbium on vicinal Si(1 0 0): Growth and properties of the 2D wetting layer and the Yb silicide phase

The Yb growth on a vicinal Si(1 0 0) surface has been studied by scanning tunneling microscopy and low energy electron diffraction in the coverage range of 1-4 ML. Two different methods of the Yb/Si(1 0 0) interface formation are applied, leading to a remarkable modification of structural and morphological properties of two-dimensional (2D) wetting layer and Yb silicide phase. In particular, the switchover of the 2D layer orientation, similar to the case of the Bi nanolines on Si(1 0 0) [J.H.G. Owen, K. Miki, D.R. Bowler, J. Mater. Sci. 41 (2006) 4568], is observed depending on the growth procedure. Moreover, the structure and morphology of the Yb silicide phase is found to depend critically on the growth conditions, and the ability to grow very long, unidirectional Yb silicide nanowires is demonstrated. The results obtained are discussed in the context of the previous studies of 1D nanowires and 3D islands of rare-earth silicides on Si(1 0 0).     

Ce掺杂Si纳米线的制备及其蓝光发射特性

以抛光和“金字塔”织构表面的单晶Si(100)为衬底,分别以Au和Au-Al为金属催化剂,在温度为1 100 ℃、N₂气流量为1 500 sccm、生长时间为15～60 min等工艺条件下,制备了直径约为50～200 nm、长度为数微米至数十微米和不同分布的Si纳米线。然后,利用CeO₂粉末为掺杂剂,在温度为1 100～1 200 ℃、N₂流量为1 000 sccm、掺杂时间为30～60 min等工艺条件下对Si纳米线进行Ce掺杂。实验研究了不同Si纳米线长度、密度和分布等对Ce3+蓝光发射的影响。室温下利用Hitachi F-4600型荧光分光光度计对样品的激发光谱和发射光谱进行了测试和分析,同时利用FLS920全功能型荧光光谱仪对样品的荧光量子效率进行了测试。结果表明,在Si纳米线生长时间为30 min、织构表面和密度相对较低时以及最佳激发光波长为328 nm时,样品发射光波长为405 nm(5d→2F_5/2)荧光强度较大,实现了强的蓝光发射,其荧光量子效率达到了65.57%。通过光谱功率分布和CIE-1931标准公式进行计算,Ce掺杂Si纳米线样品的色坐标为(0.16, 0.03);发光强度大,量子效率高使其在照明、显示等领域有着潜在的应用价值,同时对Si纳米线在发光领域的研究和应用具有一定的参考价值。     

Self-catalytic growth of horizontal and straight Si nanowires on Si substrates using a sputter deposition technique

We report on the growth of horizontal and straight Si nanowires (NWs) on Si substrate using sputter deposition of the Si layer followed by thermal annealing at 1000 °C and above. The growth of horizontal NWs was achieved without the use of any metal catalyst. Uniform cylindrical shaped Si NWs with a diameter in the range of 50–60 nm and a length of up to 8 μm were synthesized. The as-synthesized Si NWs have a Si core covered with a thin amorphous native oxide layer, as revealed by high resolution transmission electron microscopy. The aspect ratio of these Si NWs is in the range of 100–160. Micro-Raman studies on the NWs reveal a tensile strain on the Si NW core due to presence of a thin oxide layer. From the Raman shift, we calculate a strain of 1.0% for the catalyst free Si NW. FTIR analysis indicates the presence of interstitial oxygen atoms in the Si NWs, as expected from oxidation of Si NWs. For comparison, metal catalyst (Au) assisted Si NWs have also been grown on Si(100) substrate by a similar process. These NWs have a similar diameter and a marginally higher aspect ratio. A model for the growth mechanism of horizontal NWs is presented. This represents one of the first examples of direct horizontal growth of straight Si NWs on commonly used Si substrates suitable for nanoelectronic device fabrication.     

Synthesis and characterization of a large amount of branched Ni2Si nanowires

A large amount of Ni₂Si nanowires sheathed with amorphous silicon oxide has been generated from Ni substrates, for the first time, by thermal chemical vapor deposition using SiH₄ gas at 500 °C. The Ni₂Si nanowires obtained possess substantial amounts of branches (about 2-m length) grown on the main stems (about -–30 80nm diameter and -–10 20m length). High-resolution transmission electron microscopy and electron diffraction have revealed the orthorhombic Ni₂Si phase and the orientation. At the tail end along the branch grown on a stem an amorphous phase was also observed. The Raman spectrum was further used to characterize the product. A possible growth process of the branched Ni₂Si nanowires is briefly discussed. PACS 81.05.Bx; 81.07.Bc; 81.15.Gh; 87.64.Ee; 87.64.Je     

Light Harvesting and Enhanced Performance of Si Quantum Dot/Si Nanowire Heterojunction Solar Cells

Si nanowires (Si NWs) structures with good antireflection and enhanced optical‐absorption properties are used to fabricate Si quantum dots/Si NWs heterojunction solar cells. The Si NWs prepared by the metal‐assisted chemical‐etching technique exhibit a very low reflection in a wide spectral range (300–1200 nm). Correspondingly, the optical absorption reaches as high as 88.9% by weighting AM1.5G solar spectrum. Both the short current density and open current voltage are improved compared to the reference flat cell. However, the photovoltaic properties are degraded by varying the Si NWs with long etching time, possibly due to the increased etching‐induced surface states. The optimal Si NWs lead to the best cell with the power conversion efficiency of 11.3%.     

One-dimensional chain structure produced by Ce on vicinal Si(1 0 0)

One-dimensional Ce nanowires have been grown on a single-domain vicinal Si(1 0 0) surface. The growth mode, including the structural and electronic properties as a function of the substrate temperature and Ce coverage, was studied using scanning tunneling microscopy and scanning tunneling spectroscopy. The results show the formation of Ce nanowires along the step edges on the vicinal Si(1 0 0) substrate at 580 °C.     

Photoluminescence from amorphous silica nanowires synthesized using TiN/Ni/SiO2/Si and TiN/Ni/Si substrates

Photoluminescence characteristics of amorphous silica nanowires (a-SiONWs) grown on TiN/Ni/Si and TiN/Ni/SiO₂ substrates have been studied. A-SiONWs grown on TiN/Ni/Si substrates show a Si-rich composition compared to those grown from TiN/Ni/SiO₂/Si. The emission characteristics of the nanowires were found to depend on the type of substrate. By annealing the a-SiONWs grown on TiN/Ni/Si in air, emission bands shift from blue to green bands. It is likely that silicon to oxygen ratio is an important factor in deciding the types of defects and emission bands of amorphous silica nanowires.     

Formation of CuO nanowires by thermal annealing copper film deposited on Ti/Si substrate

Nanowires of various inorganic materials have been fabricated due to the realization of their applications in different fields. Large-area and uniform cupric oxide (CuO) nanowires were successfully synthesized by a very simple thermal oxidation of copper thin films. The copper films were deposited by electron beam evaporation onto Ti/Si substrates, in which Ti film was first deposited on silicon substrate to serve as adhesion layer. The structure characterization revealed that these nanowires are monoclinic structured single crystallites. The effects of different growth parameters, namely, annealing time, annealing temperature, and film thickness on the fabrication of the CuO nanowires were investigated by scanning electron microscopy. A typical procedure simply involved the thermal oxidation of these substrates in air and within the temperature range from 300 to 700 °C. It is found that nanowires can only be formed at thermal temperature of 400 °C. It is observed that the growth time has an important effect on the length and density of the CuO nanowires, whereas the average diameter is almost the same, i.e.50 nm. Different from the vapor-liquid-solid (VLS) and vapor-solid (VS) mechanism, the growth of nanowires is found to be based on the accumulation and relaxation of the stress.     

From Si nanowire to SiC nanotube

Si nanowires (NWs), with diameters of about 800 nm and lengths of about 10 ??m, previously synthesized by the VLS method with gold catalyst, were carburized at 1,100 °C under methane for conversion into SiC nanostructures. These experiments have shown that Si NWs have been transformed into SiC nanotubes (NTs) with approximately the same sizes. Nanotubes?? sidewall thickness varies from 20 to 150 nm depending on the NTs?? height. These SiC nanotubes are hexagonal in shape and polycrystalline. A model of growth based on the out-diffusion of Si through the SiC layer was proposed to explain the transformation from Si nanowires to SiC nanotubes. This model was completed with thermodynamic calculations on the Si?CH₂?CCH₄?CO₂ system and with results from complementary experiment using propane precursor. Routes for obtaining crystalline SiC NTs using this reaction are proposed.