共查询到20条相似文献,搜索用时 15 毫秒
1.
提出了对称三材料双栅应变硅金属氧化物半导体场效应晶体管器件结构,为该器件结构建立了全耗尽条件下的表面势模型、表面场强和阈值电压解析模型,并分析了应变对表面势、表面场强和阈值电压的影响,讨论了三栅长度比率对阈值电压和漏致势垒降低效应的影响,对该结构器件与单材料双栅结构器件的性能进行了对比研究.结果表明,该结构能进一步提高载流子的输运速率,更好地抑制漏致势垒降低效应.适当优化三材料栅的栅长比率,可以增强器件对短沟道效应和漏致势垒降低效应的抑制能力. 相似文献
2.
Two-dimensional analytical models for asymmetric fully depleted double-gate strained silicon MOSFETs
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This paper develops the simple and accurate two-dimensional analytical models for new asymmetric double-gate fully depleted strained-Si MOSFET. The models mainly include the analytical equations of the surface potential, surface electric field and threshold voltage, which are derived by solving two dimensional Poisson equation in strained-Si layer. The models are verified by numerical simulation. Besides offering the physical insight into device physics in the model, the new structure also provides the basic designing guidance for further immunity of short channel effect and drain-induced barrier-lowering of CMOS-based devices in nanometre scale. 相似文献
3.
本文采用渐变沟道近似和准二维分析的方法, 通过求解泊松方程, 建立了应变Si NMOSFET阈值电压集约物理模型. 模型同时研究了短沟道, 窄沟道, 非均匀掺杂, 漏致势垒降低等物理效应对阈值电压的影响. 采用参数提取软件提取了阈值电压相关参数, 通过将模型的计算结果和实验结果进行对比分析, 验证了本文提出的模型的正确性. 该模型为应变Si超大规模集成电路的分析和设计提供了重要的参考.
关键词:
应变Si NMOSFET
阈值电压
集约物理模型 相似文献
4.
提出了一种堆叠栅介质对称双栅单Halo应变Si金属氧化物半导体场效应管(metal-oxide semiconductor field effect transistor,MOSFET)新器件结构.采用分区的抛物线电势近似法和通用边界条件求解二维泊松方程,建立了全耗尽条件下的表面势和阈值电压的解析模型.该结构的应变硅沟道有两个掺杂区域,和常规双栅器件(均匀掺杂沟道)比较,沟道表面势呈阶梯电势分布,能进一步提高载流子迁移率;探讨了漏源电压对短沟道效应的影响;分析得到阈值电压随缓冲层Ge组分的提高而降低,随堆叠栅介质高k层介电常数的增大而增大,随源端应变硅沟道掺杂浓度的升高而增大,并解释了其物理机理.分析结果表明:该新结构器件能够更好地减小阈值电压漂移,抑制短沟道效应,为纳米领域MOSFET器件设计提供了指导. 相似文献
5.
Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si 1-x Ge x /relaxd Si 1-y Ge y (s-Si/s-SiGe/Si 1-y Ge y) metal-oxide-semiconductor field-effect transistor (PMOSFET),an-alytical expressions of the threshold voltages for buried channel and surface channel are presented.And the maximum allowed thickness of s-Si is given,which can ensure that the strong inversion appears earlier in the buried channel (compressive strained SiGe) than in the surface channel (tensile strained Si),because the hole mobility in the buried channel is higher than that in the surface channel.Thus they offer a good accuracy as compared with the results of device simulator ISE.With this model,the variations of threshold voltage and maximum allowed thickness of s-Si with design parameters can be predicted,such as Ge fraction,layer thickness,and doping concentration.This model can serve as a useful tool for p-channel s-Si/s-SiGe/Si 1-y Ge y metal-oxide-semiconductor field-effect transistor (MOSFET) designs. 相似文献
6.
本文在建立单轴应变Si NMOSFET迁移率模型和阈值电压模型的基础上, 基于器件不同的工作区域, 从基本的漂移扩散方程出发, 分别建立了单轴应变Si NMOSFET源漏电流模型. 其中将应力的影响显式地体现在迁移率和阈值电压模型中, 使得所建立的模型能直观地反映出源漏电流特性与应力强度的关系. 并且对于亚阈区电流模型, 基于亚阈区反型电荷, 而不是采用常用的有效沟道厚度近似的概念, 从而提高了模型的精度. 同时将所建模型的仿真结果与实验结果进行了比较, 验证了模型的可行性. 该模型已经被嵌入进电路仿真器中, 实现了对单轴应变Si MOSFET 器件和电路的模拟仿真. 相似文献
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结合应变硅金属氧化物半导体场效应管(MOSFET)结构,通过求解二维泊松方程,得到了应变Si沟道的电势分布,并据此建立了短沟道应变硅NMOSFET的阈值电压模型.依据计算结果,详细分析了弛豫Si1-βGeβ中锗组分β、沟道长度、漏电压、衬底掺杂浓度以及沟道掺杂浓度对阈值电压的影响,从而得到漏致势垒降低效应对小尺寸应变硅器件阈值电压的影响,对应变硅器件以及电路的设计具有重要的参考价值.
关键词:
应变硅金属氧化物半导体场效应管
漏致势垒降低
二维泊松方程
阈值电压模型 相似文献
9.
Tunnel field effect transistors(TFETs) are promising devices for low power applications.An analytical threshold voltage model,based on the channel surface potential and electric field obtained by solving the 2D Poisson's equation,for strained silicon gate all around TFETs is proposed.The variation of the threshold voltage with device parameters,such as the strain(Ge mole fraction x),gate oxide thickness,gate oxide permittivity,and channel length has also been investigated.The threshold voltage model is extracted using the peak transconductance method and is verified by good agreement with the results obtained from the TCAD simulation. 相似文献
10.
本文通过求解二维泊松方程,为应变Si 全耗SOI MOSFET建立了全耗尽条件下表面势模型,利用传统的漂移-扩散理论.在表面势模型的基础上,得到了应变Si 全耗SOI MOSFET的亚阈电流模型,并通过与二维器件数值模拟工具ISE的结果做比较,证明了所建立的模型的正确性.根据所建立的模型,分析了亚阈电流跟应变Si应变度的大小,应变Si膜的厚度和掺杂浓度的关系,为应变Si 全耗SOI MOSFET物理参数设计提供了重要参考.
关键词:
应变硅
FD-SOI MOSFET
表面势
亚阈电流 相似文献
11.
基于应变Si/SiGe器件结构,本文建立了统一的应变Si NMOSFET漏电流解析模型. 该模型采用平滑函数,实现了应变Si NMOSFET漏电流及其导数,从亚阈值区到强反型区以及从线性区到饱和区的平滑性,解决了模型的连续性问题. 同时考虑了载流子速度饱和效应和沟道长度调制效应的影响,进一步提高了模型精度. 通过将模型的仿真结果和实验结果对比分析,验证了所建模型的有效性. 该模型可为应变Si数字集成电路和模拟集成电路分析、设计提供重要参考.
关键词:
应变Si NMOSFET
漏电流
解析模型 相似文献
12.
Study on two-dimensional analytical models for symmetrical gate stack dual gate strained silicon MOSFETs
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Based on the exact resultant solution of two-dimensional Poisson’s equation, the novel two-dimensional models, which include surface potential, threshold voltage, subthreshold current and subthreshold swing, have been developed for gate stack symmetrical double-gate strained-Si MOSFETs. The models are verified by numerical simulation. Besides offering the physical insight into device physics, the model provides the basic designing guidance of further immunity of short channel effect of complementary metal-oxide-semiconductor (CMOS)-based device in a nanoscale regime. 相似文献
13.
An analytical model for subthreshold current and subthreshold swing of short-channel triple-material double-gate (TM-DG) MOSFETs is presented in this paper. Both the drift and diffusion components of current densities are considered for the modeling of subthreshold current. Virtual cathode concept of DG MOSFETs is utilized to model the subthreshold swing of TM-DG MOSFETs. The effect of different length ratios of the three channel regions under three different gate materials of device on the subthreshold current and subthreshold swing of the short-channel TM-DG MOSFETs have been discussed. The dependencies of subthreshold current and subthreshold swing on various device parameters have been studied. The simulation data obtained by using the commercially available 2D device simulation software ATLAS™ has been used to validate the present model. 相似文献
14.
为了改善金属氧化物半导体场效应管(MOSFET) 的短沟道效应(SCE)、 漏致势垒降低(DIBL) 效应, 提高电流的驱动能力, 提出了单Halo 全耗尽应变硅绝缘体 (SOI) MOSFET 结构, 该结构结合了应变Si, 峰值掺杂Halo结构, SOI 三者的优点. 通过求解二维泊松方程, 建立了全耗尽器件表面势和阈值电压的解析模型. 模型中分析了弛豫层中的Ge组分对表面势、表面场强和阈值电压的影响, 不同漏电压对表面势的影响, Halo 掺杂对阈值电压和DIBL的影响.结果表明, 该新结构能够抑制SCE和DIBL效应, 提高载流子的输运效率.
关键词:
应变Si
阈值电压
短沟道效应
漏致势垒降低 相似文献
15.
热载流子效应产生的栅电流是影响器件功耗及可靠性的重要因素之一,本文基于热载流子形成的物理过程,建立了单轴应变硅NMOSFET热载流子栅电流模型,并对热载流子栅电流与应力强度、沟道掺杂浓度、栅源电压、漏源电压等的关系,以及TDDB(经时击穿)寿命与栅源电压的关系进行了分析研究.结果表明,与体硅器件相比,单轴应变硅MOS器件不仅具有较小的热载流子栅电流,而且可靠性也获得提高.同时模型仿真结果与单轴应变硅NMOSFET的实验结果符合较好,验证了该模型的可行性. 相似文献
16.
小尺寸金属氧化物半导体场效应晶体管(MOSFET)器件由于具有超薄的氧化层、关态栅隧穿漏电流的存在严重地影响了器件的性能,应变硅MOSFET器件也存在同样的问题.为了说明漏电流对新型应变硅器件性能的影响,文中利用积分方法从准二维表面势分析开始,提出了小尺寸应变硅MOSFET栅隧穿电流的理论预测模型,并在此基础上使用二维器件仿真软件ISE进行了仔细的比对研究,定量分析了在不同栅压、栅氧化层厚度下MOSFET器件的性能.仿真结果很好地与理论分析相符合,为超大规模集成电路的设计提供了有价值的参考.
关键词:
应变硅
准二维表面势
栅隧穿电流
预测模型 相似文献
17.
ABSTRACTThe carrier transport in uniaxial strained Si N channel metalvn oxide semiconductor field effect transistor (NMOSFET) irradiated by gamma rays is analyzed. Based on the total dose irradiation effect, an analytical model of two-dimensional sub-threshold current for differential capacitance of uniaxial strained Si Nano NMOSFET is established. Based on this model, numerical calculation is carried out by MATLAB. The influence of geometric parameters and total dose on differential capacitance is simulated. Meanwhile, the simulation results match the experiment result very well, which validates the accuracy of the model. Therefore, the model provides a good reference for the irradiation reliability of uniaxial strained Si nano NMOSFET and the application of strained integrated circuits. 相似文献
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19.
在研究分析弛豫SiGe衬底上的应变Si 沟道nMOSFET纵向电势分布的基础上,建立了应变Si nMOSFET阈值电压模型,并利用该模型对不同的器件结构参数进行仿真,获得了阈值电压与SiGe层掺杂浓度和Ge组分的关系、阈值电压偏移量与SiGe层中Ge组分的关系、阈值电压与应变Si层掺杂浓度和厚度的关系. 分析结果表明:阈值电压随SiGe层中Ge组分的提高而降低,随着SiGe层的掺杂浓度的提高而增大;阈值电压随应变Si层的掺杂浓度的提高而增大,随应变Si层厚度增大而增大. 该模型为应变Si 器件阈值电压设计
关键词:
应变硅
阈值电压
电势分布
反型层 相似文献
20.
An improvement to computational efficiency of the drain current model for double-gate MOSFET
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As a connection between the process and the circuit design, the device model is greatly desired for emerging devices, such as the double-gate MOSFET. Time efficiency is one of the most important requirements for device modeling. In this paper, an improvement to the computational efficiency of the drain current model for double-gate MOSFETs is extended, and different calculation methods are compared and discussed. The results show that the calculation speed of the improved model is substantially enhanced. A two-dimensional device simulation is performed to verify the improved model. Furthermore, the model is implemented into the HSPICE circuit simulator in Verilog-A for practical application. 相似文献