γ射线作用下氧化铪基MOS结构总剂量效应研究

使用原子层淀积方法得到了7.8 nm厚度的HfO₂薄膜并通过直接溅射金属铝电极得到了Al/HfO₂/Si MOS电容结构,测量得到了HfO₂基MOS结构在60Co γ射线辐照前后的电容-电压特性,使用原子力显微镜得到了HfO₂薄膜在辐照前后的表面微观形貌,使用X射线光电子能谱方法测量得到了HfO₂薄膜在辐照前后的化学结构变化。研究发现,使用原子层淀积方法制备的HfO₂薄膜表面质量较高;γ射线辐照在HfO₂栅介质中产生了数量级为1012 cm-2的负的氧化层陷阱电荷;HfO₂薄膜符合化学计量比,介质内部主要的缺陷为氧空位且随着辐照剂量的增加而增加,说明辐照在介质中引入了陷阱从而导致MOS结构性能的退化。     

Distribution of electron traps in SiO_2/HfO_2 nMOSFET

In this paper, the principle of discharge-based pulsed I–V technique is introduced. By using it, the energy and spatial distributions of electron traps within the 4-nm HfO_2 layer have been extracted. Two peaks are observed, which are located at ?E ~-1.0 eV and-1.43 eV, respectively. It is found that the former one is close to the SiO_2/HfO_2 interface and the latter one is close to the gate electrode. It is also observed that the maximum discharge time has little effect on the energy distribution. Finally, the impact of electrical stress on the HfO_2 layer is also studied. During stress, no new electron traps and interface states are generated. Meanwhile, the electrical stress also has no impact on the energy and spatial distribution of as-grown traps. The results provide valuable information for theoretical modeling establishment, material assessment,and reliability improvement for advanced semiconductor devices.     

Atomic-layer-deposited Al_2O_3 and HfO_2 on InAlAs: A comparative study of interfacial and electrical characteristics

Al_2O_3 and HfO_2 thin films are separately deposited on n-type InAlAs epitaxial layers by using atomic layer deposition(ALD).The interfacial properties are revealed by angle-resolved x-ray photoelectron spectroscopy(AR-XPS).It is demonstrated that the Al_2O_3 layer can reduce interfacial oxidation and trap charge formation.The gate leakage current densities are 1.37×10~6 A/cm~2 and 3.22×10~6 A/cm~2 at+1V for the Al_2O_3/InAlAs and HfO_2/InAlAs MOS capacitors respectively.Compared with the HfO_2/InAlAs metal-oxide-semiconductor(MOS) capacitor,the Al_2O_3/InAlAS MOS capacitor exhibits good electrical properties in reducing gate leakage current,narrowing down the hysteresis loop,shrinking stretch-out of the C-V characteristics,and significantly reducing the oxide trapped charge(Q_(ot)) value and the interface state density(D_(it)).     

A new method to determine Si/SiO2 interface recombination parameters using a gate-controlled point-junction diode under illumination

A new method is presented to determine Si/SiO₂ interface recombination parameters. The device employed is constituted by a polysilicon-oxide-semiconductor capacitor with a microscale central junction (a gate-controlled point-junction diode). The excess minority carriers are photo-generated rather than being injected, which results in a one-dimensional current flow normal to the Si/SiO₂interface. The minority carrier quasi-Fermi level is probed at the Si/SiO₂ interface by means of the point junction. The one-dimensionality of the current flow and the exact knowledge of the minority carrier quasi-Fermi level permit an accurate measurement of the recombination rate. The method has been applied to characterize p-type 100 Si/SiO₂ interfaces with boron dopant concentrations ranging from 2.2×10¹⁵ to 2.0×10¹⁷ cm^-3. Data analysis has been performed using a numerical scheme to find a quasi-exact solution for the current recombining at the interface. It was found that the interface recombination parameters (trap density and capture cross-sections) depend only weakly on trap energy in a wide range around midgap. The cross-section for capturing electrons (σ_n) was found to greatly exceed (by a factor of 10² to 10³) the cross-section for capturing holes (σ_p).     

High field phenomena in thin plasma nitrided SiO2 films

The effects of high field tunnel electron injection on the electrical properties of Al - thin plasma nitrided SiO₂ films - Si (p-type) structures are studied. Under high field injection, it has been observed that electron trapping, positive charge generation near the Si-SiO₂ interface (slow states) and fast state generation at the Si-SiO₂ interface have taken place. After high temperature N₂ annealing, the nitridation induced electron trap density is considerably decreased. Furthermore, under high field injection the generation rate of both the slow states and the interface states and consequently, the degradation rate of the nitrided oxide films have been also decreased after annealing.     

阻变存储器复合材料界面及电极性质研究

采用基于密度泛函理论的第一性原理对比研究了Cu（111）/HfO₂（001）,Cu（111）/HfO₂（010）,Cu（111）/HfO₂（100）三种复合材料界面模型的失配率、界面束缚能、电荷密度、电子局域函数以及差分电荷密度. 计算结果表明：Cu（111）/HfO₂（010）失配率最小,界面束缚能最大,界面体系相对最稳定;对比电荷密度及电子局域函数图显示,只有HfO₂（010）方向形成的复合材料体系出现了垂直Cu电极方向完整连通的电子通道,表明电子在此方向上具有局域性、连通性,与阻变存储器（RRAM）器件导通方向一致;差分电荷密度图显示,Cu（111）/HfO₂（010）复合材料体系界面处存在电荷密度分布重叠的现象,界面处有电子的相互转移、成键的存在;进一步计算了Cu（111）/HfO₂（010）体系距离界面不同位置的间隙Cu原子形成能,表明越靠近界面Cu原子越容易进入HfO₂ 体内,在外加电压下易发生电化学反应,从而导致Cu导电细丝的形成与断裂. 研究结果可为RRAM存储器的制备及性能的提高提供理论指导和设计工具. 关键词： 阻变存储器 复合材料 界面 电子通道     

THE INTERACTION OF Au AND THE Si/SiO2 INTERFACE DEFECT Hit(0.494)

The defects at the Si/SiO₂ interface have been studied by the deep-level transient spectroscopy (DLTS) technique in p-type MOS structures with and without gold diffusion. The experimental results show that the interaction of gold and Si/SiO₂ interface defect,H_it(0.494), results in the formation of a new interface de-fect, Au-H_it(0.445). Just like the interface defect, H_it(0.494), the new interface defect possesses a few interesting properties, for example, when the gate voltage applied across the MOS structure reduces the energy interval between Fermi-level and Si valence band of the Si surface to values smaller than the hole ionization Gibbs free energy of the defect, a sharp DLTS peak is still observable; and the hole apparent activation energy increases with the decrease of the Si surface potential barrier height. These properties can be successfully explained with the transition energy band model of the Si/SiO₂ interface.     

Crystallization behaviors of ultrathin Al-doped HfO_2 amorphous films grown by atomic layer deposition

In this work, ultrathin pure HfO_2 and Al-doped HfO_2films(about 4-nm thick) are prepared by atomic layer deposition and the crystallinities of these films before and after annealing at temperatures ranging from 550℃ to 750℃ are analyzed by grazing incidence x-ray diffraction. The as-deposited pure HfO_2 and Al-doped HfO_2 films are both amorphous. After550-℃ annealing, a multiphase consisting of a few orthorhombic, monoclinic and tetragonal phases can be observed in the pure HfO_2 film while the Al-doped HfO_2 film remains amorphous. After annealing at 650℃ and above, a great number of HfO_2 tetragonal phases, a high-temperature phase with higher dielectric constant, can be stabilized in the Al-doped HfO_2 film. As a result, the dielectric constant is enhanced up to about 35. The physical mechanism of the phase transition behavior is discussed from the viewpoint of thermodynamics and kinetics.     

Interfacial properties of 2D WS2 on SiO2 substrate from X-ray photoelectron spectroscopy and first-principles calculations

Two-dimensional (2D) WS₂ films were deposited on SiO₂ wafers, and the related interfacial properties were investigated by high-resolution X-ray photoelectron spectroscopy (XPS) and first-principles calculations. Using the direct (indirect) method, the valence band offset (VBO) at monolayer WS₂/SiO₂ interface was found to be 3.97 eV (3.86 eV), and the conduction band offset (CBO) was 2.70 eV (2.81 eV). Furthermore, the VBO (CBO) at bulk WS₂/SiO₂ interface is found to be about 0.48 eV (0.33 eV) larger due to the interlayer orbital coupling and splitting of valence and conduction band edges. Therefore, the WS₂/SiO₂ heterostructure has a Type I energy-band alignment. The band offsets obtained experimentally and theoretically are consistent except the narrower theoretical bandgap of SiO₂. The theoretical calculations further reveal a binding energy of 75 meV per S atom and the totally separated partial density of states, indicating a weak interaction and negligible Fermi level pinning effect between WS₂ monolayer and SiO₂ surface. Our combined experimental and theoretical results provide proof of the sufficient VBOs and CBOs and weak interaction in 2D WS₂/SiO₂ heterostructures.     

Visible photoluminescence from a-Si : H/SiO2 superlattices fabricated by UHV evaporation

Hydrogenated amorphous-Si/SiO₂ (a-Si:H/SiO₂) superlattices with different a-Si : H thickness in the range of a few nanometers have been fabricated by ultra high vacuum evaporator (UHV evaporator). The photoluminescence (PL) of our superlattices is observed in the visible spectral region and the peak energy shifts to higher energy as the a-Si : H layer thickness decreases. The temperature dependence of the PL spectra reveals four sub-bands by fitting. Bands at 2.2, 1.9, 1.65 and 1.45 eV are detected and are attributed to E′δ centers, nonbridging-oxygen–hole centers (NBOHC), Si/SiO₂ interface and a-Si : H layer, respectively. We explain the overall blueshift of the PL spectra by the modification of the contribution of these sub-bands.     

溶胶凝胶法制备以HfO2为绝缘层和ZITO为有源层的高迁移率薄膜晶体管

采用溶胶凝胶法制备了h-k氧化铪HfO₂薄膜, 经500℃退火后, 获得了高透过率、表面光滑、低漏电流和相对高介电常数的HfO₂薄膜. 并采用氧化铪作为绝缘层和锌铟锡氧化物作为有源层成功地制备了底栅顶接触结构薄膜晶体管器件. 获得的薄膜晶体管器件的饱和迁移率大于100 cm²·V^-1·s^-1, 阈值电压为-0.5 V, 开关比为5×10⁶, 亚阈值摆幅为105 mV/decade. 表明采用溶胶凝胶制备的薄膜晶体管具备高的迁移率, 其迁移率接近低温多晶硅薄膜晶体管的迁移率.     

Comparative study of electrical characteristics for n-type 4H–SiC planar and trench MOS capacitors annealed in ambient NO

The interface properties and electrical characteristics of the n-type 4H-SiC planar and trench metal–oxide–semiconductor(MOS) capacitors are investigated by measuring the capacitance voltage and current voltage. The flat-band voltage and interface state density are evaluated by the quasi-static method. It is not effective on further improving the interface properties annealing at 1250℃ in NO ambient for above 1 h due to the increasing interface shallow and fast states.These shallow states reduce the effective positive fixed charge density in the oxide. For the vertical MOS capacitors on the(1120) and(1100) faces, the interface state density can be reduced by approximately one order of magnitude, in comparison to the result of the planar MOS capacitors on the(0001) face under the same NO annealing condition. In addition, it is found that Fowler–Nordheim tunneling current occurs at an oxide electric field of 7 MV/cm for the planar MOS device.However, Poole–Frenkel conduction current occurs at a lower electric field of 4 MV/cm for the trench MOS capacitor. This is due to the local field crowded at the trench corner severely causing the electrons to be early captured at or emitted from the SiO_2/Si C interface. These results provide a reference for an in-depth understanding of the mobility-limiting factors and long term reliability of the trench and planar SiO_2/Si C interfaces.     

基于Ni电极和ZrO_2/SiO_2/ZrO_2介质的MIM电容的导电机理研究

研究了基于Ni电极和原子层淀积的ZrO_2/SiO_2/ZrO_2对称叠层介质金属-绝缘体-金属(MIM)电容的电学性能.当叠层介质的厚度固定在14nm时,随着SiO_2层厚度从0增加到2nm,所得电容密度从13.1 fF/μm~2逐渐减小到9.3fF/μm~2,耗散因子从0.025逐渐减小到0.02.比较MIM电容的电流-电压(I-V)曲线,发现在高压下电流密度随着SiO_2厚度的增加而减小,在低压下电流密度的变化不明显,还观察到电容在正、负偏压下表现出完全不同的导电特性,在正偏压下表现出不同的高、低场I-V特性,而在负偏压下则以单一的I-V特性为主导.进一步对该电容在高、低场下以及电子顶部和底部注入时的导电机理进行了研究.结果表明,当电子从底部注入时,在高场和低场下分别表现出普尔-法兰克(PF)发射和陷阱辅助隧穿(TAT)的导电机理;当电子从顶部注入时,在高、低场下均表现出TAT导电机理.主要原因在于底电极Ni与ZrO_2之间存在镍的氧化层(NiO_x),且ZrO_2介质层中含有深浅两种能级陷阱(分别为0.9和2.3 eV),当电子注入的模式和外电场不同时,不同能级的陷阱对电子的传导产生作用.     

Evolution of step-terrace structure at Si–SiO2 interface in SIMOX substrate during annealing

The step-terrace structures at the interface between the Si layer and the buried SiO₂ layer of a Separation by IMplanted OXygen substrate has been observed by using atomic force microscopy (AFM) after removing the SiO₂ and Si layers. The time evolution of the Si–SiO₂ interface roughness during high-temperature annealing was analyzed by the scaling analysis of AFM data. The correlation length exhibited a nice correspondence to the size of square domain structures. Decreasing in the index of the length scale indicates that the growth mechanism changes as the annealing proceeds.     

Ta和TaN底电极对原子层淀积HfO2介质MIM电性能的影响

以Ta,TaN为衬底,采用原子层淀积方法制备高介电常数HfO₂介质,比较研究了不同衬底电极对金属-绝缘体-金属（MIM）电容的性能影响.结果表明,采用TaN底电极能够获得较高的电容密度和较小的电容电压系数（VCC）,在1MHz下的其电容密度为7.47fF/μm²,VCC为356ppm/V²和493ppm/V,这归因于TaN底电极与HfO₂介质之间良好的界面特性.两种电容在3?V时漏电流为5×10^-8关键词： 高介电常数 MIM电容 2薄膜')" href="#">HfO₂薄膜 电极     

Substrate temperature dependence of the photoluminescence efficiency of co-sputtered Si/SiO2 layers

Si particles embedded in an SiO₂ matrix were obtained by co-sputtering of Si and SiO₂ at various deposition temperatures T_d (200–700°C) and annealing at different temperatures T_a (900–1100°C). The systems were characterized by X-ray photoelectron, Raman scattering, infrared absorption and photoluminescence spectroscopy techniques. The results show that the photoluminescence efficiency is strongly dependent on the degree of phase separation between the Si nanocrystals and the SiO₂ matrix. This is likely connected with the Si/SiO₂ interface characteristics, together with the features indicating the involvement of quantum confinement.     

Reversible H2 passivation of Si ≡ Si3 interface defects in (1 1 1)Si/SiO2

K-band electron spin resonance (ESR) at 4.3 K has revealed the dipole-dipole (DD) interaction effects between [1 1 1]P_b centers (^*Si ≡ Si₃ defects with unpaired sp³ hybrid [1 1 1]) at the 2 dimensional (1 1 1)Si/SiO₂ interface. This has been enabled by the perfectly reversible H₂ passivation of P_b, which affects the defect's spin state. Sequential hydrogenation at 253–353°C and degassing treatments in high vacuum at 743–835°C allowed to vary the P_b density in the range 5 × 10¹⁰ < [P_b] (1.14 ± 0.06) × 10¹³ cm^-2. With increasing [P_b] fine structure doublets are clearly resolved. It is found that (1 1 1)Si/SiO₂ interfaces, dry thermally grown at ≈920°C, naturally comprise a ^*Si ≡ Si₃ defect density — passivated or not — of 1.14 × 10¹³ cm^-2.     

Nanoscale islands and color centers in porous anodic alumina on silicon fabricated by oxalic acid

Anodic oxidation of Al film on silicon substrate in oxalic acid is investigated through the j–t curves and its photoluminescence (PL). Their growth is analyzed with three typical stages according to j–t curve, which is agreed with the growth of nanoscale SiO₂ islands at the interface between Al film and Si substrate. The violet and blue peaks of PL were due to F⁺ and F centers, respectively. The evolvement from F⁺ to F centers during the late stage of anodization was revealed by the PL behavior at different stage.     

46.2W连续输出808nm高功率无铝半导体激光线阵模块

利用InGaAs/InGaAsP应变量子阱外延材料制作出高功率半导体激光器线阵模块,前腔面镀制了单层Al₂O₃,后腔面镀制了Al₂O₃/5(HfO₂/SiO₂)/HfO₂,采用无氧铜热沉和高效率的液体冷却器散热。在室温下,驱动电流50A时输出功率高达46.2W,最高电光转换效率41.3%,斜率效率1.15W/A。器件中心激射波长810nm,波长温度系数为0.28nm/℃,光谱半峰全宽(FWHM)₃nm,寿命突破11732h。     

退火对EBE,IBS和ALD沉积HfO2薄膜的抗激光损伤性能影响

结合自身实验条件采用电子束蒸发(EBE)、离子束溅射(IBS)和原子层沉积(ALD)三种工艺制备了HfO2薄膜,对其进行退火实验,采用1064 nm Nd:YAG激光测定了即时沉积和退火后各HfO2薄膜的抗激光损伤能力。研究发现,ALD HfO2薄膜的激光损伤阈值最高,EBE HfO2薄膜次之,IBS HfO2薄膜的损伤阈值最低;300℃退火对各工艺薄膜抗激光损伤能力的影响均为负面,500℃退火则会显著降低ALD HfO2薄膜的抗激光损伤能力。