用反应溅射法沉积SiO_x绝缘层的InGaZnO-TFT的光照稳定性(英文)

制备了基于反应溅射SiOx绝缘层的InGaZnO-TFT,并系统地研究了InGaZnO-TFT在白光照射下的稳定性,主要涉及到光照、负偏压、正偏压、光照负偏压和光照正偏压5种情况。结果表明,器件在光照和负偏压光照下的阈值偏移较大,而在正偏压光照情况下的阈值偏移几乎可以忽略。采用C-V方法证明阈值电压漂移是源于绝缘层/有源层附近及界面处的缺陷。另外,采用指数模式计算了缺陷态的弛豫时间。本研究的目的就是揭示InGaZnO-TFT在白光照射和偏压下的不稳定的原因。     

Degradation of gate-recessed MOS-HEMTs and conventional HEMTs under DC electrical stress

The performance degradation of gate-recessed metal–oxide–semiconductor high electron mobility transistor(MOSHEMT) is compared with that of conventional high electron mobility transistor(HEMT) under direct current(DC) stress,and the degradation mechanism is studied. Under the channel hot electron injection stress, the degradation of gate-recessed MOS-HEMT is more serious than that of conventional HEMT devices due to the combined effect of traps in the barrier layer, and that under the gate dielectric of the device. The threshold voltage of conventional HEMT shows a reduction under the gate electron injection stress, which is caused by the barrier layer traps trapping the injected electrons and releasing them into the channel. However, because of defects under gate dielectrics which can trap the electrons injected from gate and deplete part of the channel, the threshold voltage of gate-recessed MOS-HEMT first increases and then decreases as the conventional HEMT. The saturation phenomenon of threshold voltage degradation under high field stress verifies the existence of threshold voltage reduction effect caused by gate electron injection.     

负脉冲激励下PLZST电子发射特征及发射机理研究

采用固态烧结工艺制备了位于反铁电/铁电相界附近的掺镧锆锡钛酸铅（PLZST）反铁电陶瓷样品.采用该样品作为阴极材料,研究了其在负脉冲激励电场下的电子发射行为.负脉冲激励下,0.5 mm厚PLZST反铁电陶瓷圆片发射阈值电压为500 V;当激励电压为500 V,抽取电压为3.5 kV时,得到690 A发射电流.结果表明,PLZST反铁电陶瓷发射阈值电压低,发射电流大,即使激励电场低于陶瓷的正向开关电场,仍能得到强发射电流.最后,讨论了PLZST反铁电陶瓷在负脉冲激励下电子发射内在机制. 关键词： 反铁电材料 铁电阴极 电子发射     

Bias stress effect in low-voltage organic thin-film transistors

The bias stress effect in pentacene organic thin-film transistors has been investigated. The transistors utilize a thin gate dielectric based on an organic self-assembled monolayer and thus can be operated at low voltages. The bias stress-induced threshold voltage shift has been analyzed for different drain-source voltages. By fitting the time-dependent threshold voltage shift to a stretched exponential function, both the maximum (equilibrium) threshold voltage shift and the time constant of the threshold voltage shift were determined for each drain-source voltage. It was found that both the equilibrium threshold voltage shift and the time constant decrease significantly with increasing drain-source voltage. This suggests that when a drain-source voltage is applied to the transistor during gate bias stress, the tilting of the HOMO and LUMO bands along the channel creates a pathway for the fast release of trapped carriers.     

量子点浮置栅量子线沟道三栅结构单电子场效应管存储特性的数值模拟

通过建立二维薛定谔方程和泊松方程数值模型,对基于硅量子点浮置栅和硅量子线沟道三栅结构单电子场效应管(FET)存储特性进行了研究.通过在不同尺寸、栅压和不同写入电荷条件下,对硅量子线沟道中电子浓度的二维有限元自洽数值求解,研究了在纳米尺度下硅量子线沟道中量子限制效应和电荷分布对于器件特性的影响.模拟结果发现,沟道的导通阈值电压随着尺寸的缩小而提高,并随浮置栅内存储的电子数目的增加而明显升高.然而,这样的增加趋势在受到纳米尺度沟道中高电荷密度的影响下将出现非线性饱和趋势.进一步研究发现,当沟道尺寸较小时,沟道 关键词： 三栅单电子FET存储器 量子效应 薛定谔方程 泊松方程     

Effect of channel thickness on electrical performance of amorphous IGZO thin-film transistor with atomic layer deposited alumina oxide dielectric

We have investigated the electrical performance of amorphous indium–gallium–zinc oxide (α-IGZO) thin-film transistors with various channel thicknesses. It is observed that when the α-IGZO thickness increases, the threshold voltage decreases as reported at other researches. The intrinsic field-effect mobility as high as 11.1 cm²/Vs and sub threshold slope as low as ∼0.2 V/decade are independent on the thickness of α-IGZO channel, which indicate the excellent interface between α-IGZO and atomic layer deposited Al₂O₃ dielectric even for the case with α-IGZO thickness as thin as 10 nm. However, the source and drain series resistances increased with increasing of α-IGZO channel thickness, which results in the apparent field-effect mobility decreasing. The threshold voltage shift (ΔV_th) under negative bias stress (NBS) and negative bias illumination stress (NBIS) were investigated, also. The hump-effect in the sub threshold region under NBS and threshold voltage shift to negative position under NBIS were enhanced with decreasing of α-IGZO channel thickness, owing to the enhancement of vertical electrical field in channel.     

Degradation characteristics and mechanism of PMOSFETs under NBT--PBT--NBT stress

Degradation characteristics of PMOSFETs under negative bias temperature--positive bias temperature--negative bias temperature (NBT--PBT--NBT) stress conditions are investigated in this paper. It is found that for all device parameters, the threshold voltage has the largest shift under the first NBT stress condition. When the polarity of gate voltage is changed to positive, the shift of device parameters can be greatly recovered. However, this recovery is unstable. The more severe degradation appears soon after reapplication of NBT stress condition. The second NBT stress causes in linear drain current to degrade greatly, which is different from that of the first NBT stress. This more severe parameter shift results from the wear out of silicon substrate and oxide interface during the first NBT and PBT stress due to carrier trapping/detrapping and hydrogen related species diffusion.     

High-field-induced electron detrapping in An AlGaN/GaN high electron mobility transistor

A step stress test is carried out to study the reliability characteristics of an AlGaN/GaN high electron mobility transistor(HEMT).An anomalous critical drain-to-gate voltage with a negative temperature coefficient is observed in the stress sequence,beyond which the HEMT device starts to recover from degradation induced by early lower voltage stress.While the performance degradation featuring the drain current slump stems from electron trapping in the surface or bulk states during low-to-medium bias stress,the recovery is attributed to high field induced electron detrapping.The carrier detrapping mechanism could be helpful for lessening the trapping-related performance degradation of a GaN-based HEMT.     

超深亚微米PMOS器件的NBTI退化机理

对超深亚微米PMOS器件的负栅压温度不稳定性(NBTI)退化机理进行了研究.主要集中在对器件施加NBT和随后的PBT应力后器件阈值电压的漂移上.实验证明反型沟道中空穴在栅氧中的俘获以及氢分子在栅氧中的扩散是引起NBTI退化的主要原因.当应力条件变为PBT时，陷落的空穴可以快速退陷，但只有部分氢分子可以扩散回栅氧与衬底界面钝化硅悬挂键，这就导致了PBT条件下阈值电压只能部分恢复. 关键词： 超深亚微米PMOS器件 负偏压温度不稳定性 界面陷阱 氢气     

Influence of white light illumination on the performance of a-IGZO thin film transistor under positive gate-bias stress

The influence of white light illumination on the stability of an amorphous In GaZnO thin film transistor is investigated in this work. Under prolonged positive gate bias stress, the device illuminated by white light exhibits smaller positive threshold voltage shift than the device stressed under dark. There are simultaneous degradations of field-effect mobility for both stressed devices, which follows a similar trend to that of the threshold voltage shift. The reduced threshold voltage shift under illumination is explained by a competition between bias-induced interface carrier trapping effect and photon-induced carrier detrapping effect. It is further found that white light illumination could even excite and release trapped carriers originally exiting at the device interface before positive gate bias stress, so that the threshold voltage could recover to an even lower value than that in an equilibrium state. The effect of photo-excitation of oxygen vacancies within the a-IGZO film is also discussed.     

NBT导致的深亚微米PMOS器件退化与物理机理

研究了深亚微米PMOS器件在负偏压温度(negative bias temperature, NBT) 应力前后的电流电压特性随应力时间的退化，重点分析了NBT应力对PMOS器件阈值电压漂移的影响，通过实验证明了在栅氧化层和衬底界面附近的电化学反应和栅氧化层内与氢相关的元素的扩散，是PMOS器件中NBT效应产生的主要原因.指出NBT导致的PMOS器件退化依赖于反应机理和扩散机理两种机理的平衡. 关键词： 深亚微米PMOS器件 负偏压温度不稳定性 界面态 氧化层固定正电荷     

介质中双缺陷电荷对碳纳米管场效应晶体管量子输运特性的影响

用非平衡格林函数理论和紧束缚模型近似计算长沟道弹道输运p型碳纳米管场效应管中电流强度.研究当场效应管介质（SiO₂）中存在两个带电缺陷时，载流子散射所引起的电流强度减小和栅极阈值电压偏移量与缺陷位置的关系.介质中两个缺陷所带电荷Q₁=Q₂=+e（-e为电子电荷），都靠近源极或者都靠近漏极，或者一个电荷靠近源极另一个电荷靠近漏极.在工作状态下，所引起的电流强度相对减小比介质中只存在单个正电荷Q=+e且靠近源极（或漏极）时所引起的电流强度相对减小大得多.如果两个正电荷都在沟道中央附近，随着两个电荷的轴向距离减小，栅极阈值电压偏移的绝对值明显增加.栅极阈值电压偏移可达到-0.35 V.     

Experimental evaluation of interface states during time-dependent dielectric breakdown of GaN-based MIS-HEMTs with LPCVD-SiN_x gate dielectric

We experimentally evaluated the interface state density of Ga N MIS-HEMTs during time-dependent dielectric breakdown(TDDB). Under a high forward gate bias stress, newly increased traps generate both at the Si Nx/Al Ga N interface and the Si Nx bulk, resulting in the voltage shift and the increase of the voltage hysteresis. When prolonging the stress duration, the defects density generated in the Si Nx dielectric becomes dominating, which drastically increases the gate leakage current and causes the catastrophic failure. After recovery by UV light illumination, the negative shift in threshold voltage(compared with the fresh one) confirms the accumulation of positive charge at the Si Nx/Al Ga N interface and/or in Si Nx bulk, which is possibly ascribed to the broken bonds after long-term stress. These results experimentally confirm the role of defects in the TDDB of Ga N-based MIS-HEMTs.     

增强型AlGaN/GaN高电子迁移率晶体管高温退火研究

深入研究了两种增强型AlGaN/GaN高电子迁移率晶体管(HEMT)高温退火前后的直流特性变化.槽栅增强型AlGaN/GaN HEMT在500 ℃ N₂中退火5 min后,阈值电压由0.12 V正向移动到0.57 V,器件Schottky反向栅漏电流减小一个数量级.F注入增强型AlGaN/GaN HEMT在 400 ℃ N₂中退火2 min后,器件阈值电压由0.23 V负向移动到-0.69 V,栅泄漏电流明显增大.槽栅增强型器件退火过程中Schottky有效势垒     

High-electric-field-stress-induced degradation of SiN passivated AlGaN/GaN high electron mobility transistors

AlGaN/GaN high electron mobility transistors (HEMTs) are fabricated by employing SiN passivation, this paper investigates the degradation due to the high-electric-field stress. After the stress, a recoverable degradation has been found, consisting of the decrease of saturation drain current I_Dsat, maximal transconductance g_m, and the positive shift of threshold voltage V_TH at high drain-source voltage V_DS. The high-electric-field stress degrades the electric characteristics of AlGaN/GaN HEMTs because the high field increases the electron trapping at the surface and in AlGaN barrier layer. The SiN passivation of AlGaN/GaN HEMTs decreases the surface trapping and 2DEG depletion a little during the high-electric-field stress. After the hot carrier stress with V_DS=20 V and V_GS=0 V applied to the device for 10⁴ sec, the SiN passivation decreases the stress-induced degradation of I_Dsat from 36% to 30%. Both on-state and pulse-state stresses produce comparative decrease of I_Dsat, which shows that although the passivation is effective in suppressing electron trapping in surface states, it does not protect the device from high-electric-field degradation in nature. So passivation in conjunction with other technological solutions like cap layer, prepassivation surface treatments, or field-plate gate to weaken high-electric-field degradation should be adopted.     

Negative bias-induced threshold voltage instability and zener/interface trapping mechanism in GaN-based MIS-HEMTs

We investigate the instability of threshold voltage in D-mode MIS-HEMT with in-situ SiN as gate dielectric under different negative gate stresses.The complex non-monotonic evolution of threshold voltage under the negative stress and during the recovery process is induced by the combination effect of two mechanisms.The effect of trapping behavior of interface state at SiN/AlGaN interface and the effect of zener traps in AlGaN barrier layer on the threshold voltage instability are opposite to each other.The threshold voltage shifts negatively under the negative stress due to the detrapping of the electrons at SiN/AlGaN interface,and shifts positively due to zener trapping in AlGaN barrier layer.As the stress is removed,the threshold voltage shifts positively for the retrapping of interface states and negatively for the thermal detrapping in AlGaN.However,it is the trapping behavior in the AlGaN rather than the interface state that results in the change of transconductance in the D-mode MIS-HEMT.     

Effect of overdrive voltage on PBTI trapping behavior in GaN MIS-HEMT with LPCVD SiN_x gate dielectric

The effect of high overdrive voltage on the positive bias temperature instability(PBTI)trapping behavior is investigated for GaN metal–insulator–semiconductor high electron mobility transistor(MIS-HEMT)with LPCVD-SiNx gate dielectric.A higher overdrive voltage is more effective to accelerate the electrons trapping process,resulting in a unique trapping behavior,i.e.,a larger threshold voltage shift with a weaker time dependence and a weaker temperature dependence.Combining the degradation of electrical parameters with the frequency–conductance measurements,the unique trapping behavior is ascribed to the defect energy profile inside the gate dielectric changing with stress time,new interface/border traps with a broad distribution above the channel Fermi level are introduced by high overdrive voltage.     

开态应力下电压和电流对AlGaN/GaN高电子迁移率晶体管的退化作用研究

通过采集等功率的两种不同开态直流应力作用下AlGaN/GaN高电子迁移率晶体管(HEMTs)漏源电流输出特性、源区和漏区大信号寄生电阻、转移特性、阈值电压随应力时间的变化, 并使用光发射显微镜观察器件漏电流情况, 研究了开态应力下电压和电流对AlGaN/GaN高电子迁移率晶体管的退化作用. 结果表明, 低电压大电流应力下器件退化很少, 高电压大电流下器件退化较明显. 高电压是HEMTs退化的主要因素, 栅漏之间高电场引起的逆压电效应对参数的永久性退化起决定性作用. 除此之外, 器件表面损坏部位的显微图像表明低电压大电流下器件失效是由于局部电流密度过高, 出现热斑导致器件损伤引起的.     

Shapiro effect in mesoscopic LC circuit

In this paper we consider the movement of an electron in the single electron tunnel process through a mesoscopic capacitor. The results show that, due to the Coulomb force, there is a threshold voltage V_t in the mesoscopic LC circuit. When the external voltage is lower than the threshold voltage, the tunnel current value is zero, and the Coulomb blockade phenomenon arises. Furthermore, considering that the mesoscopic dimension is comparable to the coherence length in which charge carriers retain the phase remembrance, a weak coupling can be produced through the proximity effect of the normal metal electrons of both electrodes of a mesoscopic capacitor. By varying the external voltage, we can observe the Shapiro current step on the current－voltage characteristic curve of a mesoscopic LC circuit.     

利用倒双阶渐变阶梯形电子阻挡层减少深紫外激光二极管的电子泄露

本文提出了用双阶渐变阶梯和倒双阶渐变阶梯形电子阻挡层(EBL)以减少AlGaN基深紫外激光二极管(DUV-LDs)在p型区的电子泄露,并用Crosslight软件模拟仿真了双阶渐变阶梯和倒双阶渐变阶梯形EBL结构的光电特性,结果发现：具有倒双阶渐变阶梯形EBL的激光器拥有比双阶渐变阶梯形EBL激光器更高的斜率效率(SE),更高的输出功率,更低的阈值电流和阈值电压,更高的有效势垒高度和更低的电子泄露.这意味着前者拥有更强的抑制电子泄露的能力.在与矩形EBL结构对比中发现,所提出的结构还提高了有源区载流子浓度和辐射复合速率,进一步提高了DUV-LDs的光电性能.