Blocking performance of time switching in TDM wavelength routing networks

Advances in optical WDM technology have paved the way for high-capacity wavelength channels capable of carrying information at Gb/s rates. However, with current traffic streams requiring only a fraction of a wavelength’s bandwidth, it becomes necessary to groom these independent low rate traffic streams on to higher capacity wavelength channels. An all-optical approach to grooming is to allow many connections to time-share a wavelength. Accordingly, in a TDM wavelength routing network, the establishment of a connection requires the assignment of time slots in addition to routing and wavelength assignment. One of the primary challenges in such networks is the need for quick reconfiguration at the routing nodes. In this paper, we investigate the effects of switch reconfigurability, wavelength conversion and time slot interchangers (TSIs) on the blocking performance of connections with multiple rates. Heuristics for time slot assignment that consider constraints imposed by six different node architectures are proposed, and the blocking performance of the TDM wavelength routing network is evaluated through simulations. Results indicate that limited reconfigurability at the nodes is sufficient to attain the performance obtained with full reconfigurability, especially when connections occupy only a small fraction of the wavelength capacity. Furthermore, the blocking performance is not seen to benefit significantly with the introduction of wavelength converters and TSIs, thus signifying that the improvement in blocking is largely dependent on the switch reconfigurability at the nodes.     

Effect of edges on the reliability of GaAs and (AlGa) as heterojunction leds

The effect of various diode geometries on the degradation rate of heterojunction diodes with either GaAs or (AlGa)As in the recombination region has been studied. It is shown that GaAs diodes are particularly sensitive to edge-related degradation which varies with the current density J as J^3/2. The addition of Al to the recombination region considerably reduces the degradation rate of diodes both with and without exposed edges, and data are reported for Al_0.1Ga_0.9As stripe-contact edge-emitting structures operating for over 20,000 hours with no change in output at 1000 A/cm².     

Atomistic and electrical simulations of a GaN-AlN-(4H)SiC heterostructure optically-triggered vertical power semiconductor device

In this paper, a comprehensive simulation study is conducted to investigate the switching characteristics, gain, and breakdown voltage of a GaN-AlN-(4H)SiC based optically-triggered (OT) heterostructure vertical power semiconductor device (PSD). It comprises a 1 nm AlN buffer layer between the GaN and SiC heterointerface to achieve a reasonable compromise between lattice mismatch and lower forward drop. The results are compared with an all-(4H)SiC OT PSD. The all-(4H)SiC homostructure PSD is based completely on SiC and has no buffer layer. Further, it has the same structure, dimensions, and doping densities as that of the GaN-AlN-(4H)SiC based heterostructure PSD. While there have been studies on GaN-AlN-SiC lateral heterostructures, their primary focus has been on lateral conduction in the GaN structure with a thick (typically >300 nm) AlN buffer layer residing on top of a SiC substrate. Such an approach will not be useful for our vertical PSD because of the thick AlN layer. As such, first, a scaled molecular dynamics simulation (MDS) is carried out in DMol³ emulating the GaN-AlN-(4H)SiC heterointerface pn junction of the vertical PSD (with 1 nm AlN buffer) to assess the possibility of vertical conduction and stability of the heterointerface by calculating the density of states (DOS) at the Fermi level and the potential energy, respectively. Subsequently, detailed electrical simulations of the GaN-AlN-(4H)SiC and all-(4H)SiC vertical PSDs are carried out in Silvaco to assess their switching performances, gain, on-state drop, and blocking capabilities. The overall results indicate that, the GaN-AlN-(4H)SiC vertical PSD provides superior switching performance and optical absorption compared to the all-(4H)SiC vertical PSD, while the latter provides better gain. The blocking capabilities and forward drops are found to be comparable for both the PSDs from a practical standpoint.     

Growth kinetics and properties of heteroepitaxial (Cd,Zn)Te films prepared by metalorganic molecular beam epitaxy

Thermally precracked diethylzinc, dimethylcadmium, and diethyltelluride were used for the metalorganic molecular beam epitaxial growth of (001) ZnTe, CdTe, and CdZnTe films on GaAs substrates. Measurements of the growth rate as a function of the substrate temperature and the II/VI ratio were used to determine the growth kinetics of (001) ZnTe and CdTe. (001) CdTe,ZnTe, and CdZnTe films were deposited under near-stoichiometric growth conditions, as determined from the growth kinetics. The best heteroepitaxial films exhibited x-ray rocking curve full widths at half maximum of 200–210 arc-s. The photoluminescence spectra of the binary and ternary films at 5K were dominated by features associated with bound and free excitons. Secondary ion mass spectrometry measurements showed that the films were free of carbon and oxygen. A new mercury precursor, divinylmercury, was used for HgTe growth. Preliminary results indicated that divinylmercury is a viable mercury source for metalorganic molecular beam epitaxial growth when it is precracked.     

Comparison of device performance and measured transport parameters in widely‐varying Cu(In,Ga) (Se,S) solar cells

We report the results of an extensive study employing numerous methods to characterize carrier transport within copper indium gallium sulfoselenide (CIGSS) photovoltaic devices, whose absorber layers were fabricated by diverse process methods in multiple laboratories. This collection of samples exhibits a wide variation of morphologies, compositions, and solar power conversion efficiencies. An extensive characterization of transport properties is reported here—including those derived from capacitance–voltage, admittance spectroscopy, deep level transient spectroscopy, time‐resolved photoluminescence, Auger emission profiling, Hall effect, and drive level capacitance profiling. Data from each technique were examined for correlation with device performance, and those providing indicators of related properties were compared to determine which techniques and interpretations provide credible values for transport properties. Although these transport properties are not sufficient to predict all aspects of current‐voltage characteristics, we have identified specific physical and transport characterization methods that can be combined using a model‐based analysis algorithm to provide a quantitative prediction of voltage loss within the absorber. The approach has potential as a tool to optimize and understand device performance irrespective of the specific process used to fabricate the CIGSS absorber layer. Copyright © 2005 John Wiley & Sons, Ltd.