高速下行分组接入系统中的快速小区选择技术

高速下行分组接入(HSDPA)是WCDMA发展的第一步,采用了快速链路自适应(AMC)、快速混合重传(HARQ)及快速小区选择(FCS)等新技术。主要讨论高速下行分组接入(HSDPA)中快速小区选择(FCS)技术的应用背景、技术细节和性能评估,其中详细论述了Inter-NodeBFCS实现时需考虑的队列管理问题。最后,探讨了FCS技术中可以进一步研究的问题。     

第三代移动通信技术标准的演进

从关键技术、技术特点等方面对3G中WCDMA和cdma2000两种技术标准的演进路线进行了介绍。指出了在现 有移动通信系统的传输能力已经不能完全满足不断发展的移动数据业务的情况下,演进型3G技术的发展已 成为大势所趋。     

WCDMA系统中高速下行分组接入的接纳控制策略

高速下行分组接入(HSDPA)技术是WCDMA对于下行链路分组数据的增强,其分组数据的调度由基站(NodeB)中的MAC hs实体完成。在HSDPA的接纳控制中,数据业务的接纳控制由无线网络控制器(RNC)完成,其判决依据是当前资源的使用状况,这样就需要Node B能通过Iub接口向RNC提供详细的资源使用状况。通过针对HSDPA中流类业务、交互/后台类业务接纳控制的特点,分别从资源的分配、判别门限的设定等方面进行了分析和阐述,并给出了HSDPA中接纳控制的基本流程示意图。     

Cell search algorithms for the 3G long-term evolution

This article presents downlink initial synchronization and cell identification algorithms for long term evolution (LTE) of third-generation (3G) mobile communication systems, which are based on synchronization channel (SCH) and cell specific pilot symbols, respectively. The key features of the proposed scheme are: it can improve performance of the frequency synchronization through oversampling of the SCH, it can support a large number of target cells by modulating a cell-specific pilot sequence over two symbols within a subframe, and it can guarantee cell identification performance by maximally ratio combining the frequency domain differential cross-correlation. Simulations show that the proposed scheme has a potential use in 3G LTE.     

第三代移动通信技术的现状和展望

本文首先分析了第三代移动通信未来的业务和市场。回顾了第三代移动通信协议的标准化进程,分析了几种主流的第三代移动通信技术的特点和优势,特别分析了第三代移动通信标准化工作的最新内容和未来移动通信的可能发展方向,最后介绍了中国移动通信设备商在第三代移动通信设备研制和生产上的进展。     

Implementation Issues in Turbo Decoding for 3GPP FDD Receiver

In the Frequency Division Duplex (FDD) mode of the Third Generation Partnership Project (3GPP) standard, implementation of the turbo decoder, especially for the mobile equipments, faces design decisions related to computational complexity, power efficiency, and memory requirements. In this paper we compare different approaches of low complexity implementation of the turbo decoder, with emphasis on the issues of signal scaling and quantization, the sliding window operation for memory size reduction and the iteration stopping algorithms. The demodulated signal at the output of the RAKE receiver may have a wide dynamic range and it may require many bits of precision. In order to overcome the numerical precision problem and to prevent Log Likelihood ratio (LLR) metric overflow, a scaling algorithm must be used. Our simulation results indicate that the Average Absolute (AA) algorithm using dynamic scaling outperforms other scaling schemes and it is less sensitive to the channel conditions. One of the major challenges in the implementation of a practical turbo decoder is optimization of memory requirements. In this paper we evaluate the performance of the sliding window algorithm using different main and guard window sizes. We show that the bit and block error rate performance of the sliding window scheme mainly depend on the guard window size rather than the main window size. The simulation results indicate that small guard window sizes can significantly decrease the iteration gain for large frames in fast fading channels. Iteration stopping algorithms reduce the power consumption and the latency of the decoder and help to dedicate more resources to other functions of the receiver. The block error distribution in the fading channels makes it even more essential to use an iteration stopping rule. Our simulations conclude that a rule called the minimum absolute value appears to be a very effective, low complexity and robust algorithm. Mohamadreza Marandian Hagh was born in Tabriz, Iran on January 1974. He received the B.S. and the M.S. degrees in electrical engineering from Tehran University with honors in 1996 and 1999, respectively. He is pursuing the Ph.D. degree in electrical engineering at Northeastern University, Boston. His research interests includes information theory, channel coding and iterative techniques for wireless communication systems. His current research is focused on low complexity designs for iterative receivers using Space-Time coding in time-dispersive channels. He is also interested in Exit-Chart analysis of iterative receivers. From 1996 to 1999, he was with Sana Pro Inc. as a system engineer, developing simulation tools for OFDM, WCDMA, CDMA2000. He is currently with Airvana Inc. in Chelmsford, MA and working on 1xEVDO wireless systems. Masoud Salehi received BS degree (Summa Cum Laude) from Tehran University and MS and Ph.D. degrees from Stanford University all in Electrical Engineering. Before joining Northeastern, he was with the Departments of Electrical and Computer Engineering, Isfahan University of Technology and Tehran University. From February 1988 to May 1989 Dr. Salehi was a visiting professor at the Information Theory Research Group, Department of Electrical Engineering, Eindhoven University of Technology, The Netherlands, where he did research in network information theory and coding for storage media.In 1989 Dr. Salehi joined Department of Electrical and Computer Engineering, Northeastern University. Professor Salehi is a member of the CDSP (Communication and Digital Signal Processing) Center. His main areas of research interest are network information theory, source-channel matching problems in single and multiple user systems, data compression, turbo coding, coding for fading channels, and digital watermarking. Professor Salehi’s research has been supported by research grants from the National Science Foundation (NSF), GTE, NUWC, CenSSIS, and Analog Devices. Professor Salehi has also done consulting to the industry including Teleco Oilfield Services and AT&T. Professor Salehi is currently a member of the Editorial Board of The International Journal of Electronics and Communications.Professor Salehi is the coauthor of the textbooks “Communication Systems Engineering”, Prentice-Hall 1994, 2002, “Contemporary Communication Systems Using MATLAB and Simulink” Thomson 1998, 2000, 2004, and “Fundamentals of Communication Systems”, Prentice-Hall 2005. Abhay Sharma received B.E. (Hons) Electrical and Electronics Engineering degree from Birla Institute of Technology and Science, Pilani, India in 1996 and M.S. Electrical Engineering degree from Ohio State University, Columbus in 2000. From 2000 to 2005 he was working with Analog Devices, RF and Wireless Systems Group, Wilmington, USA, where he was working on design and implementation of algorithms for the emerging cellular communication standards. Currently he is working with Allgo Embedded Systems, Bangalore, India, in the area of wireless networks and systems based on the emerging W-PAN wireless technologies. Zoran Zvonar received the Dipl. Ing. degree in 1986 and the M.S. degree in 1989, both from the Department of Electrical Engineering, University of Belgrade, Yugoslavia, and the Ph.D. degree in Electrical Engineering from the Northeastern University, Boston, in 1993.From 1986 to 1989 he was with the Department of Electrical Engineering, University of Belgrade, Belgrade, Yugoslavia, where he conducted research in the area of telecommunications. 1993 to 1994 he was a Post-Doctoral investigator at the Woods Hole Oceanographic Institution, Woods Hole, MA, anconducted research on multiple-access communications for underwater acoustic networks. Since 1994 he has been with the Analog Devices, Communications Division, Wilmington, USA. He is the Manager of the Systems Engineering Group focusing on the design of algorithms and architectures for wireless communications, with emphasis on integrated solutions and real-time software.He was a Guest Editor of the IEEE Transactions on Vehicular Technology, the International Journal of Wireless Information Networks and the ACM/Baltzer Wireless Networks, Associate Editor of the IEEE Communications Letters and a co-editor of the books GSM: Evolution Towards Third Generation Systems, Kluwer Academic Publishers, 1998, Wireless Multimedia Networks Technologies, Kluwer Academic Publishers, 1999 and Software Radio Technologies: Selected Reading, IEEE Press, 2001. Dr. Zvonar is currently Co-Editor of the Radio Communication Series in the IEEE Communications Magazine.     

使用跨Iur口策略提升HSPA数据性能

目前,高速上行行链路分组接入技术（HSPA）在数据速率方面的优势得到了用户的高度评价,但是在RNC边界上,数据速率的下降会严重影响用户感知。现对该现象进行了分析,提出了使用HSPA Over Iur策略的解决思路,并通过一个案例证明了该策略的可行性,该策略的使用不但可以解决边界数据速率的下降,而且减少了数据速率不稳定的问题,对提升3G数据性能提供了较好的参考。     

Distributed radio access technology selection for adaptive networks in high‐speed,B3G infrastructures

Wireless systems migrate towards the era of ‘Beyond the 3rd Generation’ (B3G). A fundamental facilitator of this vision is the evolution of high speed, adaptive networks, needed for better handling the offered demand and improving resource utilization. Adaptive networks dynamically select their configuration, in order to optimally adapt to the changing environment requirements and conditions. This paper presents optimization functionality that can be used to support network adaptability (cognition‐reconfigurability) in a B3G context. The paper starts from the business case that justifies the need for placing research onto adaptive networks and then continues with the management functionality for (re)configuration decisions, which is targeted to the dynamic selection of the appropriate radio access technologies (RATs). RAT selection is modelled through an optimization problem called (RAT, Demand and QoS‐Assignment problem—RDQ‐A), the solution of which assigns in a distributed manner the available RATs to adaptive Base Station transceivers and the demand (users) to these transceivers and to QoS levels, respectively. The RDQ‐A optimization problem is decoupled in several sub‐problems and is implemented in phases corresponding to the aforementioned assignments, while efficient custom greedy algorithms are mobilized in each phase for obtaining the optimum assignment. Finally, indicative results from the application of the proposed functionality to a simulated network are presented. Copyright © 2006 John Wiley & Sons, Ltd.     

An Unbiased Signal‐to‐Interference Ratio Estimator for the High Speed Downlink Packet Access System

We propose an unbiased signal‐to‐interference ratio (SIR) estimator for the high speed downlink packet access (HSDPA) system. The proposed SIR estimator solves the problem of underestimation present in conventional SIR estimators and is suitable for channel quality measurement in the adaptive modulation and coding scheme of HSDPA, which requires accurate SIR estimation for optimum adaptive modulation and coding selection. Our analysis and simulation results demonstrate the improved estimation performance of the proposed SIR estimator.     

The Economic Value of Next‐Generation Converged Communications and Broadcasting Services

This research is to substantially analyze the economic value of portable Internet (WiBro), WCDMA High Speed Downlink Packet Access (HSDPA), WiBro+VoIP, and WiBro+DMB regarded as the next generation of broadcasting. Based on the empirical analysis of economic values, we provide the optimal paths of converged communications and broadcasting services related to WiBro. 1,000 Internet users in the Seoul and Gyeonggi areas were surveyed in their homes. The collected survey was calculated as an accurate economic value distribution for relevant services, and the average and mean were taken using a parametric logit model, semi‐parametric Spike model, and nonparametric Turnbull and Kernel estimations in order to analyze the contingent economic value of the amount offered to the subjects of the analysis. The contingent value analysis results varied slightly according to the different methodologies; however, all showed the following common features. The economic value of WiBro, Internet‐based WCDMA, VoIP, and DMB with WiBro appeared to be similar. Therefore, if WiBro and WCDMA (HSDPA) form a competitive relationship, the types of bundled services offered as portable Internet service and the supply point of such bundled services are expected to emerge in a strategic plan for stimulating service markets and the prior occupation of the market.     

A Ka‐Band 6‐W High Power MMIC Amplifier with High Linearity for VSAT Applications

A Ka‐band 6‐W high power microwave monolithic integrated circuit amplifier for use in a very small aperture terminal system requiring high linearity is designed and fabricated using commercial 0.15‐μm GaAs pHEMT technology. This three‐stage amplifier, with a chip size of 22.1 mm² can achieve a saturated output power of 6 W with a 21% power‐added efficiency and 15‐dB small signal gain over a frequency range of 28.5 GHz to 30.5 GHz. To obtain high linearity, the amplifier employs a class‐A bias and demonstrates an output third‐order intercept point of greater than 43.5 dBm over the above‐mentioned frequency range.