Nitric acid oxidation of Si (NAOS) method for low temperature fabrication of SiO2/Si and SiO2/SiC structures

We have developed low temperature formation methods of SiO₂/Si and SiO₂/SiC structures by use of nitric acid, i.e., nitric acid oxidation of Si (or SiC) (NAOS) methods. By use of the azeotropic NAOS method (i.e., immersion in 68 wt% HNO₃ aqueous solutions at 120 °C), an ultrathin (i.e., 1.3-1.4 nm) SiO₂ layer with a low leakage current density can be formed on Si. The leakage current density can be further decreased by post-metallization anneal (PMA) at 200 °C in hydrogen atmosphere, and consequently the leakage current density at the gate bias voltage of 1 V becomes 1/4-1/20 of that of an ultrathin (i.e., 1.5 nm) thermal oxide layer usually formed at temperatures between 800 and 900 °C. The low leakage current density is attributable to (i) low interface state density, (ii) low SiO₂ gap-state density, and (iii) high band discontinuity energy at the SiO₂/Si interface arising from the high atomic density of the NAOS SiO₂ layer.For the formation of a relatively thick (i.e., ≥10 nm) SiO₂ layer, we have developed the two-step NAOS method in which the initial and subsequent oxidation is performed by immersion in ∼40 wt% HNO₃ and azeotropic HNO₃ aqueous solutions, respectively. In this case, the SiO₂ formation rate does not depend on the Si surface orientation. Using the two-step NAOS method, a uniform thickness SiO₂ layer can be formed even on the rough surface of poly-crystalline Si thin films. The atomic density of the two-step NAOS SiO₂ layer is slightly higher than that for thermal oxide. When PMA at 250 °C in hydrogen is performed on the two-step NAOS SiO₂ layer, the current-voltage and capacitance-voltage characteristics become as good as those for thermal oxide formed at 900 °C.A relatively thick (i.e., ≥10 nm) SiO₂ layer can also be formed on SiC at 120 °C by use of the two-step NAOS method. With no treatment before the NAOS method, the leakage current density is very high, but by heat treatment at 400 °C in pure hydrogen, the leakage current density is decreased by approximately seven orders of magnitude. The hydrogen treatment greatly smoothens the SiC surface, and the subsequent NAOS method results in the formation of an atomically smooth SiO₂/SiC interface and a uniform thickness SiO₂.     

Reduced dielectric loss and leakage current in CaCu3Ti4O12/SiO2/CaCu3Ti4O12 multilayered films

The CaCu₃Ti₄O₁₂/SiO₂/CaCu₃Ti₄O₁₂ (CCTO/SiO₂/CCTO) multilayered films were prepared on Pt/Ti/SiO₂/Si substrates by pulsed laser deposition method. It has been demonstrated that the dielectric loss and the leakage current density were significantly reduced with the increase of the SiO₂ layer thickness, accompanied with a decrease of the dielectric constant. The CCTO film with a 20 nm SiO₂ layer showed a dielectric loss of 0.065 at 100 kHz and the leakage current density of 6×10⁻⁷ A/cm² at 100 kV/cm, which were much lower than those of the single layer CCTO films. The improvement of the electric properties is ascribed to two reasons: one is the improved crystallinity; the other is the reduced free carriers in the multilayered films.     

Leakage current and capacitance characteristics of Si/SiO2/Si single-barrier varactor

We investigate, both experimentally and theoretically, current and capacitance (I–V/C–V) characteristics and the device performance of Si/SiO₂/Si single-barrier varactor diodes (SBVs). Two diodes were fabricated with different SiO₂ layer thicknesses using the state-of-the-art wafer bonding technique. The devices have very low leakage currents (about 5×10^-2 and 1.8×10^-2 mA/mm²) and intrinsic capacitance levels of typically 1.5 and 50 nF/mm² for diodes with 5-nm and 20-nm oxide layers, respectively. With the present device physical parameters (25-mm² device area, 760-μm modulation layer thickness and ≈10¹⁵-cm^-3 doping level), the estimated cut-off frequency is about 5×10⁷ Hz. With the physical parameters of the present existing III–V triplers, the cut-off frequency of our Si-based SBV can be as high as 0.5 THz. Received: 9 February 2001 / Accepted: 9 February 2001 / Published online: 23 March 2001     

Fabrication of quantum wires by selective intermixing induced in GaAs/AlGaAs quantum well heterostructures by SiO2 capping and subsequent annealing

Results are presented demonstrating that selective intermixing of GaAs/AlGaAs quantum well heterostructures by SiO₂ capping and subsequent annealing can be spatially localized with a length scale compatible with the observation of lateral quantum confinement effects. Patterning of a 400 nm-thick SiO₂ encapsulation layer deposited by rapid thermal chemical vapor deposition into arrays of wires was performed using high resolution electron beam lithography and subsequent reactive ion etching. After high temperature (850°C) annealing, photoluminescence experiments indicate the creation of double barrier quantum wires when small trenches (< 100 nm) are etched in the SiO₂ film at a period greater than 800 nm. Signatures of the formation of one-dimensional subbands are observed both in photoluminescence excitation spectroscopy and linear polarization anisotropy analysis. A mechanism involving the ability of the stress field generated during annealing at the SiO₂ film edges to pilot the diffusion of the excess gallium vacancies which are responsible for the enhanced interdiffusion under SiO₂ is suggested to account for the high lateral selectivity achievable with this novel process.     

Studies of structure and composition of a Pt-based basic electrode for deposition of PZT ferroelectric films on silicon substrates

In this study it has been found that a TiO₂/Ti double adhesion layer is used for SiO₂/Si substrate and a YSZ layer is used for SiO₂/Si and Si substrates to achieve high residual polarization of PZT layers on platinum. Epitaxial deposition of YSZ on Si(100) provides an atomically smooth platinum layer textured in the [100] direction. The produced PZT films are mostly textured in the [111] direction; their residual polarization is 5–15 μC/cm².     

Strongly oriented BST films on La0.9Sr1.1NiO4 electrodes deposited on various substrates for integration of high capacitances on silicon

In this study, we demonstrate the successful oriented growth of Ba_0.6Sr_0.4TiO₃(h 0 0)/La_0.9Sr_1.1NiO₄(0 0 l) stacks by pulsed laser deposition on SiO₂/Si for application in integrated capacitances. We show that for specific deposition conditions the La_0.9Sr_1.1NiO₄ layer spontaneously grows along its c-axis both on SiO₂/Si and on Pt/Ti/SiO₂/Si substrates, serving as a template for the subsequent oriented growth of Ba_0.6Sr_0.4TiO₃ (BST). Moreover, as the resistivity of the La_0.9Sr_1.1NiO₄ layer is ∼1 mΩ cm, it also fulfills the function of bottom electrode for integration of perovskite-based capacitors on silicon. This holds the promise of integrating epitaxial BST with very high dielectric constant compared to polycrystalline BST films. Still, preliminary capacitance measurements on Al/BST/La_0.9Sr_1.1NiO₄/SiO₂/Si capacitors indicate that the stack deposition needs further optimization.     

Microstructure and dielectric properties of La2O3 doped amorphous SiO2 films as gate dielectric material

As a potential gate dielectric material, the La₂O₃ doped SiO₂ (LSO, the mole ratio is about 1:5) films were fabricated on n-Si (0 0 1) substrates by using pulsed laser deposition technique. By virtue of several measurements, the microstructure and electrical properties of the LSO films were characterized. The LSO films keep the amorphous state up to a high annealing temperature of 800 °C. From HRTEM and XPS results, these La atoms of the LSO films do not react with silicon substrate to form any La-compound at interfacial layer. However, these O atoms of the LSO films diffuse from the film toward the silicon substrate so as to form a SiO₂ interfacial layer. The thickness of SiO₂ layer is only about two atomic layers. A possible explanation for interfacial reaction has been proposed. The scanning electron microscope image shows the surface of the amorphous LSO film very flat. The LSO film shows a dielectric constant of 12.8 at 1 MHz. For the LSO film with thickness of 3 nm, a small equivalent oxide thickness of 1.2 nm is obtained. The leakage current density of the LSO film is 1.54 × 10⁻⁴ A/cm² at a gate bias voltage of 1 V.     

High-temperature oxidation behavior of SiO2 protective layer deposited on IN738LC superalloy by combustion CVD (CCVD)

A SiO₂ protective coating was deposited on an IN738LC alloy using CCVD. The physical properties of a SiO₂ protective layer are influenced by the amount of tetraethyl orthosilicate (TEOS, C₈H₂₀O₄Si). Therefore, the SiO₂ protective coating was deposited using different TEOS concentrations and deposition times to optimize the conditions. The deposited coating layer was confirmed to be a SiO₂ layer by SEM, EDX, and ESCA analyses. The oxidation resistance of the alloy was evaluated by thermo gravimetric analysis. The oxidation resistance of the SiO₂ protective coating was highest when the coating was processed at a TEOS concentration of 0.05 mol/l, which is the highest concentration of source material used. The surface roughness of the SiO₂ protective layer also increased with increasing TEOS concentration. The surface roughness of the coating had little effect on the oxidation resistance for a film thickness of approximately 1 μm.     

Model design on calculations of microwave permeability and permittivity of Fe/SiO2 particles with core/shell structure

Fe/SiO₂ particles with core/shell structure were prepared by coating silica on the surface of a commercial spherical carbonyl iron via the hydrolysis process of tetraethyl orthosilicate (TEOS). The electromagnetic performance of commercial carbonyl iron and as-prepared Fe/SiO₂ particles was studied theoretically and experimentally. As predicted by the theoretical calculation based on the Bruggeman formula and the Landau–Lifshitz–Gilbert (LLG) theory, the insulating surface layer of silica was effective to reduce the permittivity parameters of pure carbonyl iron. The measured results showed good agreement with the theoretical prediction. Although there was a little decrease in the permeability of the Fe/SiO₂ core/shell particles, a better impedance match especially at higher frequency range was obtained when used as a microwave absorber. The reflection loss (RL) curves show that the lowest reflection loss of Fe/Epoxy composite (−20.5 GHz) was obtained corresponding to the frequency of 8.5 GHz when the thickness of the absorber was 3 mm. A different trend was observed in Fe/SiO₂/Epoxy composite. The reflection loss value got lower by decreasing the thickness of absorbers. At the thickness of 2.2 mm, a relative low reflection loss (−17 GHz) corresponding to the frequency of 13.6 GHz was obtained. Compared with the Fe/Epoxy composite, the improvement on shifting the reflection loss peak to higher frequency and on reducing the optimal thickness of absorbers was made by Fe/SiO₂/Epoxy composite.     

The electrical properties of dielectric stacks of SiO2 and Al2O3 prepared by atomic layer deposition method

We produced dielectric stacks composed of ALD SiO₂ and ALD Al₂O₃, such as SiO₂/Al₂O₃, Al₂O₃/SiO₂, and SiO₂/Al₂O₃/SiO₂, and measured the leakage currents through the stacks in comparison with those of the single oxide layers. SiO₂/Al₂O₃ shows lowest leakage current for negative bias region below 6.4 V, and Al₂O₃/SiO₂ showed highest current under negative biases below 4.5 V. Two distinct electron conduction regimes are observed for Al₂O₃ and SiO₂/Al₂O₃. Poole-Frenkel emission is dominant at the high-voltage regime for both dielectrics, whereas the direct tunneling through the dielectric is dominant at the low-voltage regime. The calculated transition voltage between two regimes for SiO₂ (6.5 nm)/Al₂O₃ (12.6 nm) is −6.4 V, which agrees well with the experimental observation (−6.1 V). For the same EOT of entire dielectric stack, the transition voltage between two regimes decreases with thinner SiO₂ layer.     

Electroluminescence from nano-crystalline Si/ SiO2 structures embedded in pn junctions

Phosphorous-doped and boron-doped amorphous Si thin films as well as amorphous SiO₂/Si/ SiO₂ sandwiched structures were prepared in a plasma enhanced chemical vapor deposition system. Then, the p–i–n structures containing nano-crystalline Si/ SiO₂ sandwiched structures as the intrinsic layer were prepared in situ followed by thermal annealing. Electroluminescence spectra were measured at room temperature under forward bias, and it is found that the electroluminescence intensity is strongly influenced by the types of substrate. The turn-on voltages can be reduced to 3 V for samples prepared on heavily doped p-type Si (p⁺-Si) substrates and the corresponding electroluminescence intensity is more than two orders of magnitude stronger than that on lightly doped p-type Si (p-Si) and ITO glass substrates. The improvements of light emission can be ascribed to enhanced hole injection and the consequent recombination of electron–hole pairs in the luminescent nanocrystalline Si/ SiO₂ system.     

Texture control and its impact on the properties of SrBi2Ta2O9 thin films prepared by pulsed laser deposition

SrBi₂Ta₂O₉ (SBT) ferroelectric thin films with different preferred orientations were deposited by pulsed laser deposition (PLD). Several methods have been developed to control the preferred orientation of SBT thin films. For SBT films deposited directly on Pt/TiO₂/SiO₂/Si substrates and in situ crystallized at the deposition temperature, the substrate temperature has a significant impact on the orientation and the remnant polarization (Pr) of the films; a higher substrate temperature benefits the formation of (115) texture and larger grain size. The films deposited on Pt/TiO₂/SiO₂/Si substrates at 830 °C are (115)-oriented and exhibit 2Pr of 6 μC/cm². (115)- and (200)-predominant films can be formed by using a La_0.85Sr_0.15CoO₃ (LSCO) buffer layer or by annealing amorphous SBT films deposited on Pt/TiO₂/SiO₂/Si substrates at 450 °C using rapid thermal annealing (RTA). These films exhibit good electric properties; 2Pr of the films are up to 12 μC/cm² and 17 μC/cm², respectively. The much larger 2Pr of the films deposited on the LSCO buffer layer and of the films obtained by RTA than 2Pr of the films deposited on Pt/TiO₂/SiO₂/Si substrates at 830 °C is attributed to a stronger (200) texture. Received: 30 January 2001 / Accepted: 30 May 2001 / Published online: 25 July 2001     

Magnetic Properties of Fe/Ni and Fe/Co Multilayer Thin Films

In this work, the magnetic and transport properties of Fe/SiO₂/Ni and Fe/SiO₂/Co multilayers grown on Si/SiO₂ substrates have been studied. The samples have been prepared by two-stage deposition process. In the first stage, Fe layer and SiO₂ interlayer of both samples are grown by ion beam deposition technique at room temperature. Then the samples are taken out to ambient atmosphere and loaded into a pulse laser deposition (PLD) chamber. Prior to the deposition of top layer, the samples are cleaned by annealing at 150 °C. In the second stage, Ni (or Co) layer is prepared by PLD technique at room temperature. The thickness of deposited layers has been measured by Rutherford back scattering (RBS). Magnetic properties of ferromagnetic bilayers have been investigated by room-temperature ferromagnetic resonance (FMR) and vibrating sample magnetometer (VSM) techniques. Standard four-point magneto-transport measurements at various temperatures have been performed. Two-step switching in the in-plane hysteresis loops of Fe/SiO₂/Ni and Fe/SiO₂/Co samples is observed. A crossing in the middle of hysteresis loops of both samples points to a weak antiferromagnetic interaction between the magnetic layers of the stacks. Saturation magnetization values have been obtained from the VSM measurements of samples with DC magnetic field perpendicular to the films surface. Magneto-transport measurements have shown the predominant contribution of anisotropic magnetic resistance both at room and low temperatures. FMR studies of Fe/SiO₂/Ni and Fe/SiO₂/Co samples have revealed additional non-uniform (surface and bulk SWR) modes, which behavior has been explained in the framework of the surface inhomogeneity model. An origin of the antiferromagnetic interaction has been discussed.     

Formation of copper islands on a native SiO2 surface at elevated temperatures

A combination of in situ X-ray photoelectron spectroscopy analysis and ex situ scanning electron- and atomic force microscopy has been used to study the formation of copper islands upon Cu deposition at elevated temperatures as a basis for the guided growth of copper islands. Two different temperature regions have been found: (I) up to 250 °C only close packed islands are formed due to low diffusion length of copper atoms on the surface. The SiO₂ film acts as a barrier protecting the silicon substrate from diffusion of Cu atoms from oxide surface. (II) The deposition at temperatures above 300 °C leads to the formation of separate islands which are (primarily at higher temperatures) crystalline. At these temperatures, copper atoms diffuse through the SiO₂ layer. However, they are not entirely dissolved in the bulk but a fraction of them forms a Cu rich layer in the vicinity of SiO₂/Si interface. The high copper concentration in this layer lowers the concentration gradient between the surface and the substrate and, consequently, inhibits the diffusion of Cu atoms into the substrate. Hence, the Cu islands remain on the surface even at temperatures as high as 450 °C.     

A comprehensive model for the I –V characteristics of metal-Ta 2 O 5 /SiO 2 -Si structures

The I–V characteristics of metal-Ta₂O₅/SiO₂-Si structures are precisely described with a comprehensive model, for both polarities, in the whole measurement range where there is no noticeable degradation and over seven orders of magnitude of the current. Hopping conduction and tunneling were elucidated to be the dominant conduction mechanisms in the SiO₂ layer and Poole–Frenkel internal field-assisted emission in the Ta₂O₅ layer. Other possible relevant mechanisms were discussed and subsequently discarded, based on their minor contribution. Theoretical calculations are made with fitted values of the defect related constants for hopping conduction of SiO₂ and Poole–Frenkel emission of Ta₂O₅ and the thickness of the SiO₂ layer. For gates positively biased, tunneling of electrons from the silicon conduction band through the SiO₂ is considered, while for gates negatively biased, tunneling of holes from the silicon valence band. Approximations for practical use are proposed and thus introduced limitations of the model discussed. The model is demonstrated on Al-insulator-Si structures containing thermally grown Ta₂O₅, previously studied in terms of microstructural, dielectric and electrical properties. The experimental results suggest that at higher current densities (>10 nA/cm²) an effect of compensation of the existing oxide charges by accumulated charges occurs. PACS 73.40.Qv; 73.50.-h; 73.61.-r; 77.55.+f     

反应溅射VN/SiO2纳米多层膜的微结构与力学性能

采用V和SiO₂靶通过反应溅射方法制备了一系列具有不同SiO₂和VN调制层厚的VN/SiO₂纳米多层膜. 利用X射线衍射、X射线能量色散谱、高分辨电子显微镜和微力学探针表征了多层膜的微结构和力学性能. 结果表明：在Ar，N₂混和气体中，射频反应溅射的SiO₂薄膜不会渗氮. 单层膜时以非晶态存在的SiO₂，当其厚度小于1nm时，在多层膜中因VN晶体层的模板效应被强制晶化，并与VN层形成共格外延生长. 相应地，多层膜的硬度得到明显提高，最高硬度达34GPa. 随SiO₂层厚度的进一步增加，SiO₂层逐渐转变为非晶态，破坏了与VN层的共格外延生长结构，多层膜硬度也随之降低. VN调制层的改变对多层膜的生长结构和力学性能也有影响，但并不明显. 关键词： 2纳米多层膜')" href="#">VN/SiO₂纳米多层膜 共格外延生长 非晶晶化 超硬效应     

Effect of SiO2 protective layer on the femtosecond laser-induced damage of HfO2/SiO2 multilayer high-reflective coatings

Two kinds of HfO₂/SiO₂ 800 nm high-reflective (HR) coatings, with and without SiO₂ protective layer were deposited by electron beam evaporation. Laser-induced damage thresholds (LIDT) were measured for all samples with femtosecond laser pulses. The surface morphologies and the depth information of all samples were observed by Leica optical microscopy and WYKO surface profiler, respectively. It is found that SiO₂ protective layer had no positive effect on improving the LIDT of HR coating. A simple model including the conduction band electron production via multiphoton ionization and impact ionization is used to explain this phenomenon. Theoretical calculations show that the damage occurs first in the SiO₂ protective layer for HfO₂/SiO₂ HR coating with SiO₂ protective layer. The relation of LIDT for two kinds of HfO₂/SiO₂ HR coatings in calculation agrees with the experiment result.     

AlInGaN 310 nm ultraviolet metal-insulator-semiconductor sensors with photo-chemical-vapor-deposition SiO2 cap layers

Al_0.25In_0.04Ga_0.71N 310 nm near solar blind ultraviolet (UV) metal-insulator-semiconductor (MIS) sensors with different SiO₂ cap layer thickness were successfully fabricated. With appropriate SiO₂ layer thickness, the dark current of AlInGaN sensors was notably suppressed from 1.88 × 10⁻⁶ to 1.91 × 10⁻⁹ A, and the photo-generated carriers still could reach the electrodes by tunneling through the thin SiO₂ layer under the illumination. It could be clearly seen that cut-off occurred at around 300/310 nm while the responses above the bandgap were flat.     

Electroluminescence of silicon nanocrystals in MOS structures

We have studied the structural, electrical and optical properties of MOS devices, where the dielectric layer consists of a substoichiometric SiO_x (x<2) thin film deposited by plasma-enhanced chemical vapor deposition. After deposition the samples were annealed at high temperature (>1000 °C) to induce the separation of the Si and the SiO₂ phases with the formation of Si nanocrystals embedded in the insulating matrix. We observed at room temperature a quite intense electroluminescence (EL) signal with a peak at ∼850 nm. The EL peak position is very similar to that observed in photoluminescence in the very same device, demonstrating that the observed EL is due to electron–hole recombination in the Si nanocrystals and not to defects. The effects of the Si concentration in the SiO_x layer and of the annealing temperature on the electrical and optical properties of these devices are also reported and discussed. In particular, it is shown that by increasing the Si content in the SiO_x layer the operating voltage of the device decreases and the total efficiency of emission increases. These data are reported and their implications discussed. Received: 31 August 2001 / Accepted: 3 September 2001 / Published online: 17 October 2001     

Photoemission study of interfacial reactions during annealing of ultrathin yttrium on SiO2/Si(1 0 0)

X-ray photoelectron spectroscopy (XPS), ultraviolet photoelectron spectroscopy (UPS) and work-function measurements have been used to investigate the Y/SiO₂/Si(1 0 0) interfaces in situ as a function of annealing temperature. The results show that yttrium is very reactive with SiO₂ and can react with SiO₂ to form Y silicate and Y₂O₃ even at room temperature. Annealing leads to the continual growth of the Y silicate. Two distinctive reaction mechanisms are suggested for the annealing processes below and above 600 K. The reaction between metallic yttrium and SiO₂ dominates the annealing processes below 600 K, while at annealing temperatures above 600 K, a reaction between the new-formed Y₂O₃ and SiO₂ becomes dominant. No Y silicide is formed during Y deposition and subsequent annealing processes. UPS valence-band spectra indicate the silicate layer is formed at the top surface. After 1050 K annealing, a Y-silicate/SiO₂/Si structure free of Y₂O₃ is finally formed.