Specific features of the growth of A II B VI films on (0001)Al2O3 substrates

The structure and orientation of CdTe and ZnO films on sapphire have been investigated for different techniques of pregrowth substrate treatment. Polycrystalline CdTe films are found to grow of substrates unannealed or annealed in vacuum at a residual pressure P < 0.13 Pa. Epitaxial CdTe films with the sphalerite cubic structure, oriented parallel to the substrate by the (111) plane, grow on substrates annealed in air at a temperature of 1000°C or more and having a system of smooth terraces and steps on the surface. For ZnO films with a wurtzite hexagonal structure obtained by magnetron sputtering, a similar correlation between the structural quality and the regime of treatment of sapphire substrates is observed. It is shown that thermal annealing of (0001) sapphire plates in air is the optimal way of substrate preparation for growing epitaxial ZnO films with the base orientation. The obtained epitaxial CdTe films contain a certain amount of structural defects (mosaicity and twins), while the epitaixal ZnO films treated in the same way are close to perfect.     

Effect of bismuth on liquid-phase epitaxy (LPE) grown GaAs layer using Ga–As–Bi melt

GaAs epitaxial layers of high structural quality have been realised from Ga–As–Bi melt using liquid-phase epitaxy (LPE). LPE grown GaAs epitaxial layer using bismuth solvent on GaAs substrate has been found to be of good structural perfection as compared to layers using gallium solvent. The temperature-dependent PL spectra of GaAs layer, grown from Ga+Bi mixed solvent has shown that the use of bismuth does not change the band energy. ECV depth profile of heavily zinc-doped epitaxial layer shows uniform doping in the GaAs layer grown using gallium solvent as compared to the layer grown using bismuth solvent.     

人造金刚石单晶薄膜的制备及表面形貌优化

人造金刚石作为一种高效的热管理衬底,在宽禁带半导体电子器件领域具有广泛的应用前景。然而微波等离子体化学气相沉积(MPCVD)法外延金刚石单晶的生长速率慢,表面粗糙度高,难以满足半导体器件的衬底需求。对此,本文采用MPCVD法制备金刚石单晶薄膜,通过分阶段生长监控样品的生长速率,结合显微镜照片和AFM表征样品的表面形貌和表面粗糙度,根据拉曼光谱和XRD分析外延薄膜的晶体质量,最终采用高/低甲烷浓度的两步法外延工艺,实现了金刚石单晶薄膜的高速外延,生长速率达到20 μm/h,同时获得了较为平整的表面形貌。本文所研究的甲烷调制两步法外延工艺能够起到表面形貌优化的作用,有利于在后续的相关器件研发中提供平整的金刚石衬底,推动高功率电子器件的发展。     

The Mechanism as SI GaAs Substrate Influences the Resistivity of the Epitaxial Layer

It is known that it is possible to grow a semi-insulating or, at least, a high resistivity GaAs epitaxial layer without doping on an SI GaAs substrate by VPE. The SI substrate is suspected as the originator of the high resistivity intermediate layer and diffusion and/or out-diffusion are accepted as mechanisms explaining this effect. In this work carrier concentration depth profiles were studied in various GaAs multi-layered epitaxial structures grown on SI GaAs substrates before and after various heat treatment procedures in order to study the diffusion and outdiffusion processes. It is concluded that the role of the diffusion is negligible and the out-diffusion process is insignificant, and the main, i.e. the determining effect in the compensation process is the growth mechanism of the layer. The impurities set free from the substrate by chemical etching processes rebuilt into the growing layer. In addition formation of EL2 centres may be initiated by As rich gas phase composition following the in-situ etching.     

Growth temperature dependence in molecular beam epitaxy of gallium arsenide

Epitaxial layers of GaAs were grown on GaAs(100) at substrate temperatures ranging from 400° to 600°C by molecular beam epitaxy. Surface structures of the substrate and the epitaxial layers were investigated by means of low-energy electron diffraction. Two new structures of c(4 × 4) and c(8 × 8) were observed from layers grown at the low temperature of 400°C. The electrical and optical properties of layers doped with Si were investigated by measurement of Hall effect and photoluminescence as a function of growth temperature. It is found that a semi-insulating layer is grown below a critical temperature, and the layer is useful as a buffer layer for GaAs FET's. Variation of carrier concentration was observed near the interface between layers grown at different temperatures under a constant Sn beam flux. The effect is attributed to defect-induced segregation of Sn.     

Heterointerface study of perturbed LPE growth of AlGaAs/InGaP single heterostructure

This paper presents the perturbed growth of Al_0.7Ga_0.3As/In_0.5Ga_0.5P single heterostructure on a GaAs substrate by liquid-phase epitaxy. The AlGaAs-InGaP heterointerface was characterized by scanning electron microscopy, photoluminescence, Auger electron spectroscopy, and transmission electron microscopy. Evidence is provided showing that a small amount of droplets, after the slider operation of the In_0.5Ga_0.5P epitaxial growth, mixed with the Ga-rich AlGaAs melt, is sufficient to attack the In_0.5Ga_0.5P underlying layer. Even with complete melt removal, there is still a partial dissolution at the “flat” Al_0.7Ga_0.3As-In_0.5Ga_0.5P heterojunction. The Auger depth profiles reveal the composition-depth transition width at this interface to be 560Å from the 90%-10% of Al (or Ga, As, and In) Auger profile; however, the P atoms penetrate deeply into the Al_0.7Ga_0.3As layer due to the partial dissolution of In_0.5Ga_0.5P layer. By high-resolution electron-micrograph analysis, some dislocations are observed at the heterojunction leading to nonradiative recombination and to poor optical device performance, even though the heterointerface observed by scanning electron microscopy is very flat.     

A new technique for multilayer LPE

A novel technique is presented which allows LPE deposition of a large number of layers without the disadvantages arising from sliding container parts. Solutions of different compositions or containing different dopants are arranged in separate chambers. By rotation of the whole device the solutions move from one chamber to the next one without intermixing, and by controlled cooling, epitaxial layers are deposited onto the substrates fixed at the chamber walls. The sequence of the layers is determined by the sense and the angles of rotation, and the thickness of each layer is determined, among many other factors, by the cooling rate and dipping time. Up to 15 layers of III–V compounds have so far been produced in a double-screw device, with thicknesses between 0.1 to 10 μm and thickness reproductivity of about 10%. In addition, the fabrication of LED's, III–V lasers, and solar cells, and possibly superlattice devices by the MultiLPE technique can be considered.     

The role of inner and internal radiation on the melt growth of sapphire crystal

In this paper, for an inductively heated Czochralski furnace used to grow sapphire single crystal, influence of the inner (wall‐to‐wall) and crystal internal (bulk) radiation on the characteristics of the growth process such as temperature and flow fields, structure of heat transfer and crystal‐melt interface has been studied numerically using the 2D quasi‐steady state finite element method. The obtained results of global analysis demonstrate a strong dependence of thermal field, heat transport structure and crystal‐melt interface on both types of radiative heat transfer within the growth furnace.     

Distinct property effects on rapid solidification of a thin liquid layer on a substrate subject to self-consistent melting

Heat transfer of a molten splat in a thin layer rapidly solidified on a cold substrate subject to self-consistent melting and distinct thermal and physical properties has been numerically investigated. Micro-electro-mechanical systems, semi-conductor technology, splat cooling, plasma or powder spray deposition, single and twin-roller melt spinning, strip and slab casting, melt extraction, etc. are usually characterized by rapid solidification of a thin liquid layer on a cold substrate. This work has proposed that the one-dimensional rapid freezing in the splat is governed by nonequilibrium kinetics at the solidification front while the melting in the substrate is determined from the traditional phase change condition. The results show that to delay the freezing of the splat and accelerate the melting of the substrate, an increase in the splat-to-substrate specific heat ratio and decreases in Stefan number, dimensionless solid conductivity of the substrate and substrate-to-splat density ratio are suggested. The freezing of the splat and melting of the substrate are delayed by increasing dimensionless initial temperature and decreasing dimensionless nucleation temperature of the splat. An early melting of the substrate while maintaining the same onset time for the freezing of the splat can be achieved by increasing the dimensionless kinetic coefficient and equilibrium melting temperature of the splat and decreasing the dimensionless equilibrium melting temperature of the substrate. The effects of the parameters on enthalpies and interface velocities in the splat and substrate are also presented.     

Compositional Effects on Solidification of Congruently Melting InSb

In vertical Bridgman and Czochralski growth of stoichiometric electronic materials such as InSb, GaSb, and GaAs, growth from stoichiometric melts is commonly desired to achieve high quality. Off-stoichiometric growth is considered significant in the quest to understand transport phenomena leading to the observed sporadic inclusions. Here we apply radiographic interface visualization and calibrated interface temperature measurements to study growth of InSb from off-stoichiometric melts. The crystals are analyzed for structure and chemical segregation. Results indicate concentration boundary layer formation in the melt ahead of the interface. Evidence is presented for heterogeneous nucleation sites within αInSb. Analysis indicates that these nucleation sites develop ahead of the interface in the off-stoichiometric melt phase as the melt temperature at the interface drops below the congruent melting temperature of αInSb.     

介电层修饰并五苯/红荧烯双有源有机薄膜晶体管的制备与性能研究

在Si/SiO2衬底上使用聚甲基丙烯酸甲酯(PMMA)制备器件介电层的修饰层,改善介电层界面质量并诱导有源层生长,从而提高有源层的结晶程度.通过真空蒸镀法生长并五苯/红荧烯双层结构有源层,制备有机薄膜晶体管(OTFT),并研究器件性能随红荧烯层厚度变化的情况.测试结果表明,修饰后的器件阈值电压为-3.55 V,电流开关比大于105,迁移率达到0.0558 cm2/V·s,亚阈值摆幅为1.95 V/dec,器件总体性能得到改善.     

Growth and annealing effect of high-quality ZnSe:N/ZnSe by MOCVD

The ZnSe : N epitaxial layers were grown on (1 1 0) ZnSe substrates in a low-pressure metalorganic chemical vapor deposition (MOCVD) system using hydrogen as a carrier gas, and using ammonia as a dopant source. In order to obtain highly doped ZnSe : N epitaxial layers, the optimum growth and doping conditions were determined by studying the photoluminescence (PL) spectra from the ZnSe epitaxial layers grown at different ammonia flux and VI/II flux ratio. Furthermore, in order to enhance the concentration of active nitrogen in ZnSe epitaxial layer, a rapid thermal anneal technique was used for post-heat-treating. The results show that the annealing temperature of over 1023 K is necessary. Beside, a novel treatment method to obtain a smooth substrate surface for growing high quality ZnSe epitaxial layers is also described.     

Numerical investigation of heat transport and fluid flow during the seeding process of oxide Czochralski crystal growth Part 2: rotating seed

In this paper, the role of seed rotation on the characteristics of the two‐dimensional temperature and flow field in the oxide Czochralski crystal growth system has been studied numerically for the seeding process. Based on the finite element method, a set of two‐dimensional quasi‐steady state numerical simulations were carried out to analyze the seed‐melt interface shape and heat transfer mechanism in a Czochralski furnace with different seed rotation rates: ω_seed = 5‐30 rpm. The results presented here demonstrate the important role played by the seed rotation for influencing the shape of the seed‐melt interface during the seeding process. The seed‐melt interface shape is quite sensitive to the convective heat transfer in the melt and gaseous domain. When the local flow close to the seed‐melt interface is formed mainly due to the natural convection and the Marangoni effect, the interface becomes convex towards the melt. When the local flow under the seed‐melt interface is of forced convection flow type (seed rotation), the interface becomes more concave towards the melt as the seed rotation rate (ω_seed) is increased. A linear variation of the interface deflection with respect to the seed rotation rate has been found, too. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Numerical investigation of the effect of heat shield shape on the oxygen impurity distribution at the crystal–melt interface during the process of Czochralski silicon crystal growth

In this study, a numerical simulation is performed to investigate the effect of the shape of the heat shield on the oxygen concentration in the melt. The results show that the oxygen concentration in the melt can be significantly decreased by increasing the speed of the argon gas near the crucible wall. This can be achieved by enlarging the horizontal length of the heat shield. The oxygen concentration at the melt–crystal interface varies with the length of the crystal growth. In the initial stage, there is a significant decrease in the oxygen concentration as the growth length increases. There is also a significant reduction in the emission of oxygen from the crucible wall due to the lower melt depth and crucible temperature. The transportation of oxygen impurity towards the melt–crystal interface is suppressed by the vortex motion in the melt. When the crystal exceeds a certain length, the oxygen concentration in the melt–crystal interface starts to increase with increasing crystal length, due to the drop in vortex motion in the melt.     

AlN/Si(100)上CVD SiC薄膜的光致发光谱

本工作用化学气相淀积方法在AlN/Si(100)复合衬底上生长SiC薄膜.外延生长过程中,采用C4H4和SiH4作为反应气源,H2作为载气.样品的X-射线衍射谱和拉曼散射谱显示,所得到的外延层为六角对称的SiC薄膜.俄歇电子能谱及X-射线光电子能谱的测量结果表明,在外延膜中存在来自衬底的Al和N元素.样品的光致发光测量显示,所有的样品均可在室温下观察到位于3.03eV和3.17eV处的发光峰,这分别相应于4H-SiC能带中电子从导带到Al受主能级之间的辐射跃迁和电子从N施主能级到价带之间的辐射跃迁,从而表明所得的外延薄膜的多形体为4H-SiC.     

Epitaxial growth of ferroelectric oxide films

This review paper begins with a brief overview of the most common ferroelectric materials, the perovskites and the Aurivillius families. The epitaxial growth of ferroelectric epitaxial films can be a viable approach to improve the ferroelectric properties, in particular for the layered perovskites. Defects related to a polycrystalline structure, which lead to a degradation of ferroelectric properties like remanent polarisation, piezoelectric coefficient, charge retention, and may cause time-dependent fatigue problems, can be prevented. However, it is also to be considered that effects connected with thin films like substrate clamping, strain or finite thickness may limit the film properties. Substitution of elements allows the adjustment of the film characteristics to the device function. Additionally, the orientation of the films can be controlled by the appropriate choice of the substrate, which is important due to the anisotropy of the ferroelectrics.The deposition methods commonly used for ferroelectric oxide layers are reviewed, particularly with regard to epitaxial growth. The conditions under which stoichiometric, crystalline growth can be obtained are described. The paper primarily focuses on the MO-CVD technique.Furthermore whether epitaxial growth of ferroelectric films occurs or not depends on several conditions like lattice mismatch between film and substrate, surface orientation and crystal symmetry of the substrate, thermal expansion of film and substrate. The influence of these parameters on epitaxial growth is discussed. Local epitaxial growth of ferroelectric layers on metallic electrodes is also mentioned due to its importance in device fabrication. The site-engineering concept is shortly reviewed as the substitution of elements constitutes a simple way to modify film properties in thin film technology.     

Si(111)外延GaN的表面形貌及形成机理研究

用高温AlN作缓冲层在Si(111)上外延生长出GaN薄膜.通过对薄膜表面扫描电子显微镜(SEM)和高分辨率双晶X射线衍射(DCXRD)的分析,确定缓冲层对外延层形貌的影响,分析解释了表面形貌中凹坑的形成及缓冲层生长温度对凹坑的影响.结果表明:温度的高低通过影响缓冲层初始成核密度和成核尺寸来影响外延层表面形貌.     

Structural and electrical properties of CuGaSe2 thin films on GaAs substrates

CuGaSe₂ thin films with thicknesses in the range of 0.1 μm were deposited onto semiinsulating (111) A-oriented GaAs substrates by flash evaporation under controlled growth conditions. Epitaxial growth begins at a substrate temperature of T_sub = 835 K. Besides the chalcopyrite phase a hexagonal modification was observed in the range T_sub = 835 to 855 K. At T_sub ≧ 860 K the films have sphalerite structure. All epitaxial films were p-type conducting. Two acceptor levels with ionization energies of about 150 meV and 550 meV, respectively, were obtained from an analysis of electrical and photoluminescence measurements.     

Determination of the Thickness of Chemically Removed Thin Layers on GaAs VPE Structures

Thinning of epitaxial GaAs layers was studied during the surface etching, with a special attention to submicron epitaxial structures, like MESFET or varactor-type structures. Each chemical treatment influences the crystal surface during the device preparation processes, though the possible thinning of the active layer is small. Therefore a method allowing determination of thicknesses as small as at about 20 nm of the layer removed by chemical etching from GaAs VPE structures was applied. Using special multilayered structures and a continuous electrochemical carrier concentration depth profiling, the influence of the layer thickness inhomogeneity and of some measurement errors can be minimized. Some frequently used etchants and the influence of different – so called – non-etching processes were compared in different combinations. It was shown that besides the direct etching a change of the surface conditions occurs, which influences the etch rate in the succeeding etching procedure.     

Influence of textured c-Si surface morphology on the interfacial properties of heterojunction silicon solar cells

For the HIT solar cells, the properties of interface between intrinsic thin film and c-Si are critical for the resulting device. The interfacial properties mainly depend on the surface passivation quality of c-Si, which is found to be affected by the morphology of textured surfaces. In this study, four kinds of textured c-Si substrates are fabricated: large pyramids without chemical polished (CP), large pyramids with CP, small pyramids without CP and small pyramids with CP. We investigated the effects of textured-surface morphology on the passivation of c-Si, the thin layer coverage and the interfacial properties of heterojunction prepared by HWCVD. Minority carrier lifetime measurements show that the wafer with small pyramids leads to better surface passivation than the one with large pyramids. The good coverage and contact between the thin film and the substrate can be achieved and no epitaxial growth occurs on the wafer with small pyramids through the study of TEM. Dark I-V measurements reveal that the heterojunction on wafer with small pyramids and CP has low recombination at the a-Si:H/c-Si interface. Our results indicate that the surface with small pyramids and low surface roughness is beneficial to the performance of HIT solar cells.