On the charge profiles in thin dielectric films

The relation between the charge profile and potential barrier height-voltage characteristics of metal/insulator/metal (MIM) structures is derived. The possibility of determining the charge profile using internal photoemission measurements and the derived relation is discussed.     

Influence of charge deposition in a field-emission display panel

Field-emission displays (FEDs) have been studied intensively in recent years as a candidate for flat-display panels in the future. In a FED, electrons emit from field emitters. Some electrons may impinge on the insulator surface between cathode and gate electrodes and cause charging of that surface because the yield of secondary electron emission is usually not equal to one. The charging of the insulator walls between cathode and gate electrodes is one of the important factors influencing the performance of a FED. In this paper, a simulation program is used to calculate this charge deposition, electric field distribution and electron trajectories. From the change of the electric field upon charge deposition in the triode region, it is shown that the insulator surface is negatively charged at a low gate voltage, e.g. 20 V. However, positive charge is deposited when the gate voltage is high, e.g. 100 V. The simulations also show that the emission current will increase even further after coating the dielectric with a thin film of a material with a high-secondary emission coefficient such as MgO. If a cone-shaped dielectric aperture is used in a triode, the emission current will decrease after charge deposition. However, the focus performance of the electron beam is improving in this case.     

Energy barriers at the interfaces in the MIS system Me-Yb2O3-Si

The electrophysical properties of silicon MIS structures with ytterbium oxide as the insulator are investigated. It is established that the electrical conductivity of the MIS structures are described by a Poole-Frenkel mechanism. The capacitance-voltage curves are used to measure the trapped charge in the insulator and the density of surface states. The energy barriers for electrons at the interfaces are determined by the method of internal photoemission of charge carriers into the insulator. The parameters of deep electron traps in ytterbium oxide are investigated. Zh. Tekh. Fiz. 69, 60–64 (April 1999)     

Analytical model including the fringing-induced barrier lowering effect for a dual-material surrounding-gate MOSFET with a high-κ gate dielectric

By solving Poisson’s equation in both semiconductor and gate insulator regions in the cylindrical coordinates, an analytical model for a dual-material surrounding-gate (DMSG) metal–oxide semiconductor field-effect transistor (MOSFET) with a high-κ gate dielectric has been developed. Using the derived model, the influences of fringing-induced barrier lowering (FIBL) on surface potential, subthreshold current, DIBL, and subthreshold swing are investigated. It is found that for the same equivalent oxide thickness, the gate insulator with high-κ dielectric degrades the short-channel performance of the DMSG MOSFET. The accuracy of the analytical model is verified by the good agreement of its results with that obtained from the ISE three-dimensional numerical device simulator.     

Electric field and the charge distribution on the surface of an insulator in a vacuum

The free charge steady-state distribution over the insulator surface that arises in a strong electric field in a vacuum can be found by solving the boundary-value problem for the electrostatic field strength if the angle between the field vector and vacuum-insulator interface is given. A general solution to this boundary-value problem is derived for the case of an in-plane field and rectilinear interfaces. Laws of charge and field formation that follow from the solution obtained are considered. Formulas for the electric field strength and charge density in terms of elementary functions are obtained for a number of particular cases. Power-type expressions for the electric field and a critical angle between the electrode and insulator surface that describe the field behavior and charge distribution near the vacuum-insulator-electrode contact are derived.     

Analytical model including the fringing-induced barrier lowering effect for a dual-material surrounding-gate MOSFET with a high-kappa gate dielectric

By solving Poisson's equation in both semiconductor and gate insulator regions in the cylindrical coordinates, an analytical model for a dual-material surrounding-gate (DMSG) metal-oxide semiconductor field-effect transistor (MOSFET) with a high-kappa gate dielectric has been developed. Using the derived model, the influences of fringing-induced barrier lowering (FIBL) on surface potential, subthreshold current, DIBL, and subthreshold swing are investigated. It is found that for the same equivalent oxide thickness, the gate insulator with high-kappa dielectric degrades the short-channel performance of the DMSG MOSFET. The accuracy of the analytical model is verified by the good agreement of its results with that obtained from the ISE three-dimensional numerical device simulator.     

Reflection and transmission of ballistic electrons at a potential barrier

The reflection as well as transmission of ballistic electrons at a potential barrier is studied as a function of the angle of incidence. The samples are based on high mobility two dimensional electron gases in AlGaAs/GaAs -heterostructures using split gate point contacts for collimated emission as well as detection of ballistic electron beams. The variable electrostatic barrier is formed as a depletion space charge layer by biasing a 45° tilted gate strip. An external magnetic field is used to adjust the angle of incidence. The experimental results are compared to a model for the transmission and reflection coefficients at a potential boundary.     

Resonance charge relaxation in physical barrier layers

It is shown experimentally that the space charge domain (SCD) of a MIS structure can be described as a layer-macrorelaxer by applying the appropriate formula for the Schottky barrier. The maximal time of the transient t_C (the saturation time t_CH) of the change in MIS-structure capacitance upon imposition of a sufficiently large rectangular depleting voltage pulse is expressed by the formula mentioned. A new method is correspondingly proposed for determining the ionization energy of bulk centers responsible for this relaxation. A comparison with data in the literature is presented and the prospects for developing representations on resonance charge relaxation in barrier layers is indicated.     

Influence of inserting AlN between AlSiON and 4H-SiC interface for the MIS structure

A control of interface between gate insulating film and semiconductor is required to achieve high-power field effect transistors (FET) using SiC. To improve the interface between the high-k layer and SiC, we propose inserting an AlN layer as an interfacial layer. The reason for selecting AlN film is that it has a wide bandgap, as well as almost the same lattice constant as that of 4H-SiC. The insertion of AlN film between 4H-SiC and the insulating film effectively reduces the interfacial roughness. The roughness of the interface between AlN and SiC can be suppressed compared with that of the thermal oxidized SiC. Moreover, the AlSiON film was deposited on the AlN layer as a high dielectric gate insulating film with low leakage current at high temperature and low space charge. The C-V characteristics of the AlSiON/AlN/SiC MIS structure with an AlN buffer layer are improved by increasing the deposition temperature of the AlN film. This demonstrates that AlSiON/AlN/SiC is one of attractive MIS structures for SiC devices.     

Charge degradation of an mis system with nonuniform tunnel-injected current density distribution

Using a model of the charge state of a metal-insulator-semiconductor (MIS) system with a nonuniform distribution of tunneling-injected current, we have investigated charge degradation of the dielectric in the neighborhood of defects (with a lowered semiconductor-insulator potential barrier) and a thinner insulator film. We determined the character and change in the charge state and the current load of defect regions during the initial stages of injection. We determined the dependence of the intensity of degrading processes on the ratio of the defect area to the defect-free portion of the structure. We show that a localized increase in tunnel current density is possible around a defect. Kaluzhskii Branch of the N. E. Bauman State Technical University, Moscow. Translated from Izvestiya Vysshikh Uchebnykh Zavedenii, Fizika, Vol. 42, No. 1, pp. 49–54, January, 1999.     

Pentacene field effect transistor as an injection-type element: Maxwell–Wagner type interfacial polarization and carrier transport

Pentacene field-effect transistor (FET) is analyzed as an injection-type element, assuming that carrier accumulation at the pentacene-gate insulator is due to the Maxwell–Wagner effect. The FET characteristics are derived based on a model in which carriers injected from electrodes are accumulated at the interface, and they are then conveyed along the channel by the force of electric field formed between source and drain electrodes. Optical second harmonic generation from the channel is dependent on the off- and on-states of the FET channel, and suggesting that carriers injected from source electrode make a significant contribution to the space charge field formation.     

Forward and reverse bias current-voltage characteristics of Au/n-Si Schottky barrier diodes with and without SnO2 insulator layer

The effects of interfacial insulator layer, interface states (N_ss) and series resistance (R_s) on the electrical characteristics of Au/n-Si structures have been investigated using forward and reverse bias current-voltage (I-V) characteristics at room temperature. Therefore, Au/n-Si Schottky barrier diodes (SBDs) were fabricated as SBDs with and without insulator SnO₂ layer to explain the effect of insulator layer on main electrical parameters. The values of ideality factor (n), R_s and barrier height (Φ_Bo) were calculated from ln(I) vs. V plots and Cheung methods. The energy density distribution profile of the interface states was obtained from the forward bias I-V data by taking bias dependence of ideality factor, effective barrier height (Φ_e) and R_s into account for MS and MIS SBDs. It was found that N_ss values increase from at about mid-gap energy of Si to bottom of conductance band edge of both SBDs and the MIS SBD’s N_ss values are 5-10 times lower than those of MS SBD’s. An apparent exponential increase from the mid-gap towards the bottom of conductance band is observed for both SBDs’ (MS and MIS) interface states obtained without taking R_s into account.     

GaN基MIS紫外探测器的电学及光电特性

制备了GaN基金属-绝缘层-半导体(MIS)结构紫外探测器,并测量了其暗电流和光谱响应。通过分析其暗电流,发现在反偏情况下,其主要电流输运机制为隧穿复合机制;在正偏情况下,随着偏压的增大,电流输运机制从隧穿机制变为空间电荷限制电流机制。光谱响应测试结果显示,该探测器在-5 V的偏压下,在315 nm处获得了最大响应度170 mA/W,探测度为2.3×10¹² cm·Hz^1/2·W^-1。此外,还研究了不同厚度I层对器件光电压的影响,结果表明,光电压受隧穿机制与漏电流机制的共同制约。     

Photoresponse of the In0.3Ga0.7N metal-insulator-semiconductor photodetectors

In0.3Ga0.7N metal-insulator-semiconductor （MIS） and metal-semiconductor （MS） surface barrier photodetectors have been fabricated. The In0.3Ga0.7N epilayers were grown on sapphire by metalorganic chemical vapour deposition （MOCVD）. The photoresponse and reverse current-voltage characteristics of the In0.3Ga0.7N MIS and MS photodetectors were measured. A best zero bias responsivity of 0.18 A/W at 450 nm is obtained for the In0.3Ga0.7N MIS photodetector with 10 nm Si3N4 insulator layer, which is more than ten times higher than the In0.3Ga0.7N MS photodetector. The reason is attributed to the decrease of the interface states and increase of surface barrier height by the inserted insulator. The influence of the thickness of the Si3N4 insulator layer on the photoresponsivity of the MIS photodetector is also discussed.     

Effect of the space charge of emitted electrons on field electron emission

It is shown that the conventional technique of substituting the field strength at the space charge-emitter interface that is calculated with the Poisson equation into the Fowler-Nordheim formula considerably overestimates the effect of space charge on field electron emission. In this work, the space-charge-induced field attenuation as a function of the emission current density and radius of curvature of the emitter surface is derived using the model of a planar space-charge layer. It is argued that field electron emission cannot be studied in terms of the spherical diode model, since it assumes the presence of a space charge on the back (nonemitting) emitter surface, which is in fact absent. It is stated that one should consider the discrete character of the charges when investigating the space charge in field electron emission, because the mean spacing between the electrons emitted far exceeds the emission barrier width.     

Surface and electrical properties of organic-inorganic hybrid structure as gate insulator to organic thin film transistor

Carbon-based OTFT devices were fabricated using a plasma process for the gate electrode and gate insulators. A nanocrystalline carbon (nc-C) film was used as the gate electrode, and three different layers, cyclohexene, diamond-like carbon (DLC), and cyclohexene/DLC (hybrid insulator), were used as the gate insulator. The surface and electrical properties of the three different gate insulators on the nc-C gate electrode were investigated using the SPM method, and the leakage current density and dielectric constant of the metal-insulator-metal (MIM) structures with three different insulator layers were evaluated. The hybrid insulator layer had a very smooth surface, approximately 0.2 nm, a uniform surface without defects, and good adhesion between the layers. Overall, it is believed that the hybrid insulator lead to a decrease in the electrical leakage current and an improvement in the device performance.     

The modified Kaw's model based on rectangular voltage pulses for the calculation of the charge pumping current in mis transistors

The charge pumping current results from recombination associated with the SiO₂-Si interface traps under the gate of a MISFET when a voltage pulse is applied to the gate. The modified Kaw's model is proposed which predicts this current as a function of frequency, amplitude and average voltage of pulses with peak-to-peak amplitudes larger than the difference between the flatband and inversion voltages and with pulse transitions fast enough so that negligible capture or emission occurs during the transition. The presented modification of Kaw's model of the charge pumping effect enables to compute the dependences of the charge pumping current for various types of MIS transistors with different dimensions manufactured by different technologies.     

Surface charge carrier motion on insulating surfaces: One dimensional motion

We consider a model for the motion of charge carriers on the surface of an insulator. The insulator surface is either infinite, semi–infinite against a conducting half space or a strip between two conducting half spaces. The charge flux on the surface is assumed equal to the charge density times the electric field component in the surface, with time a constant. When the charge carrier motion in the plane is assumed constant in one direction, we can write the problem as an inviscid Burgers equation for a complex function. The imaginary part of this function is minus the carrier density while the real part, the Hilbert transform of the carrier density, is minus the electric field on the surface. Using the method of characteristics, we find an exact implicit solution for the problem and illustrate it with several examples. One set of examples, on the real line, or half of it, show how charge moves and how the surface may discharge into a conducting wall. They also show that the system can sustain shock wave solutions which are different from those in a real Burgers equation and other singular behaviour. Exact solutions on a finite strip between two conducting walls also show how that system can discharge completely, and also demonstrate shock waves. These systems are of particular interest because they are experimentally accessible.     

High on/off current ratio in ballistic CNTFETs based on tuning the gate insulator parameters for different ambient temperatures

A theoretical study is presented on the on/off current ratio limits for a ballistic coaxially-gated carbon nanotube field effect transistor (CNTFET) with highly doped source/drain regions. Based on changes in gate insulator dielectric constant and thickness, the current ratio has been estimated at different ambient temperatures. Decreasing the gate insulator thickness after a certain value around 3 nm causes the current ratio to degrade drastically. Although the higher dielectric constant values have a fair effect on current ratio, this effect could be suppressed when the device with a low gate insulator thickness works at a low ambient temperature. The simulation results also show that the temperature drastically degrades the current ratio value; whereas in a certain range of ambient temperature, tuning the values of gate insulator thickness and dielectric constant could be very helpful. In this way, the optimum values of gate insulator thickness and dielectric constant are identified to offer the highest on/off current ratio of the device.     

Preparation and characterisation of crystalline tris(acetylacetonato)Fe(III) films grown on p-Si substrate for dielectric applications

Thin tris(acetylacetonato)iron(III) films were prepared by sublimation in vacuum on glass and p-Si substrates. Then comprehensive studies of X-ray fluorescence (XRF), X-ray diffraction (XRD), optical absorption spectroscopy, AC-conductivity, and dielectric permittivity as a function of frequency and temperature have been performed. The prepared films show a polycrystalline of orthorhombic structure. The optical absorption spectrum of the film was identical with that of the bulk powder layer. For electrical measurements of the complex as insulator, sample in form of metal-insulator-semiconductor (MIS) structure was prepared and characterised by the measurement of the capacitance and AC-conductance as a function of gate voltage. From those measurements, the state density D_it at insulator/semiconductor interface and the density of the fixed charges in the complex film were determined. It was found that D_it was of order 10¹⁰ eV⁻¹/cm² and the surface charge density in the insulator film was of order 10¹⁰ cm⁻². The frequency dependence of the electrical conductivity and dielectric properties of MIS structures were studied at room temperature. It was observed that the experimental data follow the correlated barrier-hopping (CBH) model, from which the fundamental absorption edge, the cut off hopping distance, and other parameters of the model were determined. It was found that the capacitance of the complex increases as temperature increases. Generally, the present study shows that the tris(acetylacetonato)iron(III) films grown on p-Si is a promising candidate for low-k dielectric applications, it displays low-k value around 2.0.