95 MeV Oxygen Ion Irradiation Effects on N-Channel Mosfets

The N-channel metal oxide semiconductor field effect transistors (MOSFETs) were exposed to 95 MeV oxygen ions in the fluence range of 5 × 10¹⁰ to 5 × 10¹³ ions/cm². The influence of ion irradiation on threshold voltage (V_TH), linear drain current (I_DLin), leakage current (I_L), drain conductance (gD), transconductance (gm), mobility (μ) and drain saturation current (I_DSat) of MOSFETs was studied systematically for various fluence. The V_TH of the irradiated MOSFET was found to decrease significantly after irradiation. The interface (N_it) and oxide trapped charge (N_ot) were estimated from the subthreshold measurements and were found to increase after irradiation. The densities of oxide-trapped (ΔN_it) charge in irradiated MOSFETs were found to be higher than those of the interface trapped charge (ΔN_ot). The I_DLin and I_DSat of MOSFETs were also found to decrease significantly after irradiation. Studies on effects of 95 MeV oxygen ion irradiation on gm, gD and μ show a degradation varying from 70 to 75% after irradiation. The mobility degradation coefficients for N_it(α_it) and N_ot(α_it) were estimated. The results of these studies are presented and discussed.     

On the effects of NBTI degradation in p-MOSFET devices

This paper presents the effects of interface trap concentration and threshold voltage shift on NBTI degradation in p-MOSFETs. To explore the degradation mechanisms, transistors having an EOT of 1.1 nm and 5 nm were simulated by applying various stress conditions. The NBTI degradation mechanism was studied by varying the gate voltage, temperature and substrate doping level. The simulations show NBTI degradation in terms of the threshold voltage shift, ΔV_th and number of interface traps, ΔN_it. The simulation results show an improved degradation trend in terms of ΔV_th and ΔN_it when the substrate doping level is increased.     

Comparison of effect of 5 MeV proton and Co-60 gamma irradiation on silicon NPN rf power transistors and N–channel depletion MOSFETs

NPN transistors and N-channel depletion metal oxide semiconductor field effect transistors (MOSFETs) were irradiated with 5?MeV protons and ⁶⁰Co gamma radiation in the dose ranging from 1?Mrad(Si) to 100?Mrad(Si). The different electrical characteristics of the NPN transistor such as Gummel characteristics, excess base current (ΔI_B), dc current gain (h_FE), transconductance (g_m), displacement damage factor (K) and output characteristics were studied as a function of total dose. The different electrical characteristics of N-channel MOSFETs such as threshold voltage (V_th), density of interface trapped charges (ΔN_it), density of oxide trapped charges (ΔN_ot), transconductance (g_m), mobility (µ) and drain saturation current (I_DSat) were studied systematically before and after irradiation in the same dose ranges. A considerable increase in the base current (I_B) and decrease in the h_FE, g_m and collector saturation current (I_CSat) were observed after irradiation in the case of the NPN transistor. In the N-channel MOSFETs, the ΔN_it and ΔN_ot were found to increase and V_th, g_m, µ and I_DSat were found to decrease with increase in the radiation dose. The 5?MeV proton irradiation results of both the NPN transistor and N-channel MOSFETs were compared with ⁶⁰Co gamma-irradiated devices in the same dose ranges. It was observed that the degradation in 5?MeV proton-irradiated devices is more when compared with the ⁶⁰Co gamma-irradiated devices at higher total doses.     

Low-voltage-drive and high output current ZnO thin-film transistors with sputtering SiO2 as gate insulator

Low-voltage-drive ZnO thin-film transistors (TFTs) with room-temperature radio frequency magnetron sputtering SiO₂ as the gate insulator were fabricated successfully on the glass substrate. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 4.2 V, a field effect mobility of 11.2 cm²/V s, an on/off ratio of 3.1 × 10⁶ and a subthreshold swing of 0.61 V/dec. The drain current can reach to 1 mA while the gate voltage is only of 12 V and drain voltage of 8 V. The C–V characteristics of a MOS capacitor with the structure of ITO/SiO₂/ZnO/Al was investigated. The carrier concentration N_D in the ZnO active layer was determined, the calculated N_D is 1.81 × 10¹⁶ cm⁻³, which is the typical value of undoped ZnO film used as the channel layer for ZnO-TFT devices. The experiment results show that SiO₂ film is a promising insulator for the low voltage and high drive capability oxide TFTs.     

高$lt;i$gt;k$lt;/i$gt;栅介质小尺寸全耗尽绝缘体上锗p型金属氧化物半导体场效应晶体管漏源电流模型

通过求解沟道的二维泊松方程得到沟道表面势和沟道反型层电荷, 建立了高k栅介质小尺寸绝缘体上锗(GeOI) p型金属氧化物半导体场效应晶体管(PMOSFET)的漏源电流解析模型. 模型包括了速度饱和效应、迁移率调制效应和沟长调制效应, 同时考虑了栅氧化层和埋氧层与沟道界面处的界面陷阱电荷、氧化层固定电荷对漏源电流的影响. 在饱和区和非饱和区, 漏源电流模拟结果与实验数据符合得较好, 证实了模型的正确性和实用性. 利用建立的漏源电流模型模拟分析了器件主要结构和物理参数对跨导、漏导、截止频率和电压增益的影响, 对GeOI PMOSFET的设计具有一定的指导作用. 关键词： 绝缘体上锗p型金属氧化物半导体场效应晶体管 漏源电流模型 跨导 截止频率     

Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced.     

Analytical modeling and simulation of subthreshold behavior in nanoscale dual material gate AlGaN/GaN HEMT

A two-dimensional (2-D) analytical model for a Dual Material Gate (DMG) AlGaN/GaN High Electron Mobility Transistor (HEMT) has been developed to demonstrate the unique attributes of this device structure in suppressing short channel effects (SCEs). The model accurately predicts the channel potential, electric field variation along the channel, and sub-threshold drain current, taking into account the effect of lengths of the two gate metals, their work functions, barrier layer thicknesses, and applied drain biases. It is seen that the SCEs and hot carrier effects in DMG AlGaN/GaN HEMT are suppressed due to the work function difference of the two metal gates, thereby screening the drain potential variations by the gate near the drain. Besides, a more uniform electric field along the channel leads to improved carrier transport efficiency. The accuracy of the results obtained from our analytical model has been verified using ATLAS device simulations.     

Hot-carrier degradation for 90nm gate length LDD-NMOSFET with ultra-thin gate oxide under low gate voltage stress

The hot-carrier degradation for 90~nm gate length lightly-doped drain (LDD) NMOSFET with ultra-thin (1.4~nm) gate oxide under the low gate voltage (LGV) (at V_g=V_th, where V_th is the threshold voltage) stress has been investigated. It is found that the drain current decreases and the threshold voltage increases after the LGV (V_g=V_th stress. The results are opposite to the degradation phenomena of conventional NMOSFET for the case of this stress. By analysing the gate-induced drain leakage (GIDL) current before and after stresses, it is confirmed that under the LGV stress in ultra-short gate LDD-NMOSFET with ultra-thin gate oxide, the hot holes are trapped at interface in the LDD region and cannot shorten the channel to mask the influence of interface states as those in conventional NMOSFET do, which leads to the different degradation phenomena from those of the conventional NMOS devices. This paper also discusses the degradation in the 90~nm gate length LDD-NMOSFET with 1.4~nm gate oxide under the LGV stress at V_g=V_th with various drain biases. Experimental results show that the degradation slopes (n) range from 0.21 to 0.41. The value of n is less than that of conventional MOSFET (0.5-0.6) and also that of the long gate length LDD MOSFET (\sim0.8).     

Exploring the effect of width on performance enhancement in NMOSFETs with a silicon-carbon alloy stressor and a tensile stress silicon nitride liner

The stress distribution in the Si channel regions of a SiC source/drain and stressed silicon nitride liner NMOSFETs with various widths were studied using 3D simulations. The mobility enhancement was found to be dominated by the tensile stress along the transport direction. Stress along the width direction was found to have the least effect on the drain current. The compressive stress along the vertical direction perpendicular to the gate oxide (S_zz) contributes significantly to the mobility enhancement and cannot be neglected in NMOSFETs with a width between 0.05 and 1 μm. The impact of width on performance improvements such as the drive current gain was also analyzed.     

Electrical properties of carbon-nanotube-network transistors in air after gamma irradiation

We experimentally evaluate the electrical properties of carbon nanotube (CNT)-network transistors before and after ⁶⁰Co gamma-ray irradiation up to 50 kGy in an air environment. When the total dose is increased, the degree of the threshold voltage (V_th) shift towards positive gate voltages in the drain current–gate voltage (I_D–V_GS) characteristics decreases for total irradiation doses above 30 kGy, although it is constant below 30 kGy. From our analysis of the I_D–V_GS characteristics along with micro-Raman spectroscopy, the gamma-ray irradiation does not change the structure of the CNT network channel for total doses up to 50 kGy; it instead generates charge traps near the CNT/SiO₂ gate insulator interfaces. These traps are located within the SiO₂ layer and/or the adsorbate on the device surface. The positively charged traps near the CNT/SiO₂ interface contribute less to the V_th shift than the interface dipoles at the CNT/metal electrode interfaces and the segment of the CNT network channel below doses of 30 kGy, while the contribution of the charge traps increases for total doses above 30 kGy. Our findings indicate the possibility of the application of CNT-network transistors as radiation detectors suitable for use in air for radiation doses above 30 kGy.     

A study on the performance of metal-oxide-semiconductor-field-effect-transistors with asymmetric junction doping structure

Diode currents of MOSFET were studied and characterized in detail for the ion implanted pn junction of short channel MOSFETs with shallow drain junction doping structure. The diode current in MOSFET junctions was analyzed on the point of view of the gate-induced-drain leakage (GIDL) current. We could found the GIDL current is generated by the band-to-band tunneling (BTBT) of electrons through the reverse biased channel-to-drain junction and had good agreement with BTBT equation. The effect of the lateral electric field on the GIDL current according to the body bias voltage is characterized and discussed. We measured the electrical doping profiling of MOSFETs with a short gate length, ultra thin oxide thickness and asymmetric doped drain structure and checked the profile had good agreement with simulation result. An accurate effective mobility of an asymmetric source–drain junction transistor was successfully extracted by using the split C–V technique.     

A unified drain current 1/f noise model for GaN-based high electron mobility transistors

In this work, we present a theoretical and experimental study on the drain current 1/f noise in the AIGaN/GaN high electron mobility transistor （HEMT）. Based on both mobility fluctuation and carrier number fluctuation in a two- dimensional electron gas （2DEG） channel of AlGaN/GaN HEMT, a unified drain current 1/f noise model containing a piezoelectric polarization effect and hot carrier effect is built. The drain current 1/f noise induced by the piezoelectric polarization effect is distinguished from that induced by the hot carrier effect through experiments and simulations. The simulation results are in good agreement with the experimental results. Experiments show that after hot carrier injection, the drain current 1/f noise increases four orders of magnitude and the electrical parameter degradation Agm/gm reaches 54.9%. The drain current 1/f noise degradation induced by the piezoelectric effect reaches one order of magnitude; the electrical parameter degradation Agm/gm is 11.8%. This indicates that drain current 1/f noise of the GaN-based HEMT device is sensitive to the hot carrier effect and piezoelectric effect. This study provides a useful reliability characterization tool for the A1GaN/GaN HEMTs.     

Ge metal oxide semiconductor field effect transistors with optimized Si cap and HfSiO2 high-k metal gate stacks

High mobility metal-oxide-semiconductor-field-effect-transistors (MOSFETs) are demonstrated on high quality epitaxial Si_0.75Ge_0.25 films selectively grown on Si (100) substrates. With a Si cap processed on Si_0.75Ge_0.25 channels, HfSiO₂ high-k gate dielectrics exhibited low C–V hysteresis (<10 mV), interface trap density (7.5 × 10¹⁰), and gate leakage current (∼10⁻²A/cm² at an EOT of 13.4 Å), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the Si_0.75Ge_0.25 channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of Si_0.75Ge_0.25 channels, which are major causes of the high off-state current of small band gap energy Si_0.75Ge_0.25 pMOSFETs, by improving gate control over the channel.     

Suppression of the tunneling effect by shallow junctions in field-effect transistor

We study the quantum wave transport in nanoscale field-effect transistors. It has been shown that the tunneling effect between the source and the drain in an ultra-short channel transistor significantly degrades the control of the drain current by the gate. However, the tunneling effect is suppressed by reducing the depth of the source and drain junctions which is designated to suppress the short-channel effects concerning the cut-off characteristics of the field-effect transistor. The reduced junction depth confines the carriers in the direction (y -direction) perpendicular to the transport direction (x -direction). The matching of y -direction wavefunctions at regional boundaries suppresses the tunneling effect and normal FET current–voltage characteristics has been obtained, which explains theoretically the successful fabrication of nanoscale field-effect transistors.     

金属-氧化物-半导体器件γ辐照温度效应

研究了金属-氧化物-半导体(MOS)器件在γ射线辐照条件下的温度效应.采用加固的CC4007进 行辐照实验,在不同温度、不同偏压,以及不同退火条件下对MOS器件的辐照效应进行了比 较,发现温度对辐照效应的影响主要是决定界面态建立的快慢.高温下辐照的器件,界面态 建立的时间缩短.根据实验结果对器件阈值电压漂移的机理进行了探讨. 关键词： 金属-氧化物-半导体场效应 辐射效应 阈值电压漂移     

Actions of negative bias temperature instability (NBTI) and hot carriers in ultra-deep submicron p-channel metal——oxide——semiconductor field-effect transistors (PMOSFETs)

Hot carrier injection (HCI) at high temperatures and different values of gate bias V_g has been performed in order to study the actions of negative bias temperature instability (NBTI) and hot carriers. Hot-carrier-stress-induced damage at V_g=V_d, where V_d is the voltage of the transistor drain, increases as temperature rises, contrary to conventional hot carrier behaviour, which is identified as being related to the NBTI. A comparison between the actions of NBTI and hot carriers at low and high gate voltages shows that the damage behaviours are quite different: the low gate voltage stress results in an increase in transconductance, while the NBTI-dominated high gate voltage and high temperature stress causes a decrease in transconductance. It is concluded that this can be a major source of hot carrier damage at elevated temperatures and high gate voltage stressing of p-channel metal--oxide--semiconductor field-effect transistors (PMOSFETs). We demonstrate a novel mode of NBTI-enhanced hot carrier degradation in PMOSFETs. A novel method to decouple the actions of NBTI from that of hot carriers is also presented.     

Evaluation of channel hot carrier effects in n-MOS transistors at 77 K with the charge pumping technique

With the charge pumping technique, the role of hot holes in the channel hot carrier degradation of short channel n-MOS transistors is shown to be less pronounced at 77 K than at 300 K. Also fewer fast interface states are generated at 77 K for the same substrate current level in the low gate bias regime. Furthermore, the dominant device degradation is found to be in the high gate bias regime at 77 K, in contrast to the case of 300 K. This is due to the presence of negative charge in the oxide or in acceptor-type interface states.     

C-V characterization of Schottky- and MIS-gate SiGe/Si HEMT structures

Electrical properties of Schottky- and metal-insulator-semiconductor (MIS)-gate SiGe/Si high electron mobility transistors (HEMTs) were investigated with capacitance-voltage (C-V) measurements. The MIS-gate HEMT structure was fabricated using a SiN gate insulator formed by catalytic chemical vapor deposition (Cat-CVD). The Cat-CVD SiN thin film (5 nm) was found to be an effective gate insulator with good gate controllability and dielectric properties. We previously investigated device characteristics of sub-100-nm-gate-length Schottky- and MIS-gate HEMTs, and reported that the MIS-gate device had larger maximum drain current density and transconductance (g_m) than the Schottky-gate device. The radio frequency (RF) measurement of the MIS-gate device, however, showed a relatively lower current gain cutoff frequency f_T compared with that of the Schottky-gate device. In this study, C-V characterization of the MIS-gate HEMT structure demonstrated that two electron transport channels existed, one at the SiGe/Si buried channel and the other at the SiN/Si surface channel.     

AlGaN/GaN HEMT based hydrogen sensor with platinum nanonetwork gate electrode

AlGaN/GaN high electron mobility transistor (HEMT) based hydrogen sensors incorporating platinum nanonetworks in the gate region were demonstrated. Pt nanonetworks with 2–3 nm diameter were synthesized by a simple and low-cost solution phase method, and applied to the gate electrode of transistor sensor. The HEMT with physically and electrically connected Pt nanonetwork gate showed good pinch-off and modulation of drain current characteristics. Compared to conventional Pt thin film AlGaN/GaN HEMT sensor, the Pt nanonetwork sensor has dramatically improved current response to hydrogen. Relative current change of Pt nanonetwork gated sensor in 500 ppm H₂ balanced with Air ambient was 3.3 × 10⁶% at V_GS of ?3.3 V, while 2.5 × 10²% at V_GS of ?2.9 V for Pt film. This results from large increase in channel conductance induced by huge catalytic surface area of nanostructured Pt networks.     

量子阱Si/SiGe/Sip型场效应管阈值电压和沟道空穴面密度模型

Si材料中较低的空穴迁移率限制了Si互补金属氧化物半导体器 件在高频领域的应用. 针对SiGe p型金属氧化物半导体场效应管(PMOSFET)结构, 通过求解纵向一维泊松方程,得到了器件的纵向电势分布, 并在此基础上建立了器件的阈值电压模型,讨论了Ge组分、缓冲层厚度、 Si帽层厚度和衬底掺杂对阈值电压的影响.由于SiGe沟道层较薄, 计算中考虑了该层价带势阱中的量子化效应. 当栅电压绝对值过大时, 由于能带弯曲和能级分裂造成SiGe沟道层中的空穴会越过势垒到达Si/SiO₂界面, 从而引起器件性能的退化. 建立了量子阱SiGe PMOSFET沟道层的空穴面密度模型, 提出了最大工作栅电压的概念, 对由栅电压引起的沟道饱和进行了计算和分析. 研究结果表明,器件的阈值电压和最大工作栅压与SiGe层Ge组分关系密切, Ge组分的适当提高可以使器件工作栅电压范围有效增大.