沉淀剂对ZnO压敏陶瓷缺陷结构和电气性能的影响

研究了不同沉淀剂(NH₄HCO₃和NaOH)对共沉淀法制备的ZnO压敏陶瓷性能的影响. 结果表明: 不同的沉淀剂对ZnO压敏陶瓷的微观结构及电气性能有明显的影响. 其中陶瓷微观结构的变化主要由沉淀剂本身的性质引起; 而电气性能的改变除了与微观结构相关外, 主要受不同沉淀剂对陶瓷晶界势垒参数的影响; 此外, 沉淀剂NaOH引入的Na⁺作为施主杂质离子掺杂ZnO压敏陶瓷, 增加晶粒中的自由电子浓度, 因此本征缺陷(锌填隙和氧空位)浓度受到抑制, 而锌填隙浓度相对于氧空位而言对施主离子掺杂更为敏感. 由此, 采用共沉淀法制备ZnO压敏陶瓷粉体时, 沉淀剂种类的选择很重要, 即使微量的杂质也会引起压敏陶瓷性能的较大改变, 应尽可能避免杂质离子的引入. 关键词： ZnO压敏陶瓷 缺陷结构 沉淀剂 介电性能     

ZnO压敏陶瓷缺陷结构表征及冲击老化机理研究

对多元ZnO压敏陶瓷电阻片进行了多达14000次的大电流冲击老化试验, 通过显微结构、电气性能及介电特性的测量对其缺陷结构进行了表征, 并研究了缺陷结构与大电流冲击老化之间的关系. 试验表明多次大电流冲击老化导致试样的电气性能明显下降, 发现ZnO压敏陶瓷的几何效应不仅受控于晶粒还与晶界密切相关. 另外, 通过介电谱分析观察到ZnO压敏陶瓷存在四种缺陷弛豫过程, 低温-60 ℃下的两个缺陷弛豫峰激活能约为0.24 eV和0.35 eV, 认为它们分别对应着本征的锌填隙缺陷L(Zn_i^··)和氧空位缺陷L(V_O^·)并且不受冲击老化的影响. 高温80℃以上两个松弛峰的活化能约为0.71 eV和0.84 eV, 认为它们分别对应着非本征的晶间相电子陷阱L(ingr)和晶界处界面态陷阱L(gb). 发现大电流冲击后, 仅界面态陷阱激活能从0.84 eV降低到0.76 eV, 认为界面态陷阱主要控制着ZnO压敏陶瓷的电气性能和稳定性.     

ZnO压敏陶瓷中缺陷的介电谱研究

从理论上证明了介电松弛过程在介电谱上等效于电子松弛过程,认为室温下10⁵Hz处特征损耗峰起源于耗尽层处本征缺陷所形成的电子陷阱.在-130—20℃范围内测量了三种配方ZnO陶瓷的介电频谱,发现ZnO压敏陶瓷室温下10⁵Hz处的特征损耗峰在低温下分裂为两个特征峰,认为它们起源于耗尽层中的本征缺陷(锌填隙或/和氧空位)的电子松弛过程.发现ZnO-Bi₂O₃二元系陶瓷特征峰仅仅由锌填隙引起,而ZnO-Bi_{2关键词： ZnO压敏陶瓷 本征缺陷 介电谱 热处理}     

ZnO压敏陶瓷冲击老化的电子陷阱过程研究

使用8/20 μs脉冲电流发生器对普通商用ZnO陶瓷压敏电阻片进行了最多5000次的冲击试验.测量了冲击前后试样的电气性能和介电特性,分析了冲击后小电流区的U-I特性和损耗角正切值tanδ随脉冲大电流的不断作用而发生的变化.实验发现压敏电压U1mA随冲击次数的增加经历增大—稳定—减小三个过程.认为正反偏Schottky势垒的中性费米能级的变化是影响样品小电流区的最根本原因.本文提出用试样的非线性系数α作为老化特征参数比传统的U _{关键词： ZnO压敏陶瓷 非线性系数 冲击老化 压敏电压}     

ZnO压敏陶瓷的介电谱

在-160℃-200℃温度范围内、0.1 Hz-0.1 MHz频率范围内测量了 ZnO压敏陶瓷的介电频谱, 发现可以采用电导率谱低频端的类直流特性来表征晶界Schottky势垒的电子输运过程, 获得的Schottky势垒高度为0.77 eV. 基于背靠背双Schottky势垒模型, 提出当存在直流偏压时, 势垒高度将随直流偏压线性增大. 基于此势垒模型计算了ZnO压敏陶瓷单晶界的直流偏压大小, 进而计算出晶粒平均尺寸为6.8 μm, 该理论值与通过扫描电子显微镜断面照片获得的测量值的偏差在5%以内. 可见采用介电谱不但可以获得势垒高度实现电气性能的表征, 还能获得晶粒尺寸实现显微结构的表征.     

ZnO压敏陶瓷介电损耗的温度谱研究

利用Novocontrol宽频介电谱仪在-100—20 ℃温度范围内测量了ZnO-Bi₂O₃系压敏陶瓷的介电频谱,其频率范围为10^-2—10⁶ Hz. 研究表明： ZnO压敏陶瓷特征损耗峰的活化能分别为0.26和0.36 eV,结合实验条件、理论计算结果及其他现象的分析排除了特征损耗峰源于阴极电子注入、夹层极化和偶极子转向极化的可能.热刺激电流（TSC）谱共出现三个峰,其中高温峰对应于TSC实验加压过程引入的热离子极化,而中温峰和低温峰对应于介电损耗峰. 在分析的基础上,提出了ZnO压敏陶瓷的特征损耗峰起源于耗尽层内本征缺陷的电子弛豫过程. 关键词： ZnO压敏陶瓷 本征缺陷 介电谱 热刺激电流     

ZnO压敏陶瓷中的本征缺陷

研究了ZnO-Sb₂O₃-BaO系和ZnO-Bi₂O₃-Sb₂O₃-BaO系压敏陶瓷的介电损耗因子D(tanδ)与频率f的关系。发现不含Bi₂O₃试样在室温附近出现一新的损耗峰,峰值频率在2MHz左右,对应的电子陷阱能级为0.18eV,分析认为是由于本征缺陷Zn_i所致。设想Bi离子对Zn_i 关键词：     

ZnO-Bi2O3系压敏陶瓷的晶界电子结构

测量了ZnO-Bi₂O₃系压敏陶瓷在不同温度下的介电频谱,基于压敏陶瓷介电特征损耗峰起源于耗尽层内本征缺陷电子松弛过程的理论,计算了ZnO的本征缺陷结构,并进一步求出了晶界的微观电参数和宏观单晶界击穿电压.单晶界击穿电压的理论值与实验测量值符合得很好,这表明本文建立的基于介电谱计算本征缺陷的方法是有效的. 关键词： ZnO压敏陶瓷 晶界电子结构 介电谱     

ZnO-Bi2O3系压敏陶瓷的导电过程与等效势垒高度

研究了ZnO-Bi2O3系压敏陶瓷等效势垒高度φeff随着归一化电压的变化规律,发现等效势垒高度φeff随着归一化电压的增加先逐渐增大,达到最大值后持续下降.由于在外加电压作用下反偏势垒高度高于正偏势垒高度,等效势垒高度φeff主要取决于反偏势垒.因此,这种变化规律说明了ZnO压敏陶瓷晶界的导电过程可能存在三个阶段.在低归一化电压区,晶界区域中的电子从正偏势垒区注入到晶界无序层的速率低于电子从晶界无序层抽出到反偏势垒区的速率,从而导致等效势垒高度随着归一化电压的增加逐渐增大.在中等归一化电压区,电子从正偏势垒区注入到晶界无序层的速率和电子从晶界无序层抽出到反偏势垒区的速率相平衡,等效势垒高度达到最大值.在高归一化电压区,电子从正偏势垒区注入到晶界无序层的速率高于电子从晶界无序层抽出到反偏势垒区的速率,等效势垒高度随着归一化电压的增加逐渐下降,直至晶界击穿.同时分析了等效势垒高度φeff对泄漏电流IL的影响,发现泄漏电流与等效势垒高度差Δφ呈指数关系.     

掺杂水平对ZnO基变阻器电学性能的影响

根据相图规则设计、制备了三个系列不同Bi₂O₃与Sb₂O₃掺杂水平的ZnO基复合变阻器材料,研究了掺杂对氧化锌复合陶瓷电学性能的影响.研究发现,当Sb元素掺杂水平较低时,随着Sb₂O₃掺杂量的增加,所得氧化锌基变阻器材料漏电流的变化也很小,非线性系数(非线性系数α_L和击穿非线性系数α_B)将减小,而场强(场 关键词： 氧化锌 掺杂 复合陶瓷变阻器 电学性质     

Effect of Sb-doping on the morphology and dielectric properties of chrysanthemum-like ZnO nanowire clusters

Chrysanthemum-like ZnO nanowire clusters with different Sb-doping concentrations were prepared using a hydrothermal process. The microstructures, morphologies, and dielectric properties of the as-prepared products were characterized by X-ray diffraction (XRD), high-resolution transmission electron microscopy (HRTEM), field emission environment scanning electron microscope (FEESEM), and microwave vector network analyzer respectively. The results indicate that the as-prepared products are Sb-doped ZnO single crystallines with a hexagonal wurtzite structure, the flower bud saturation degree F d is obviously different from that of the pure ZnO nanowire clusters, the good dielectric loss property is found in Sb-doped ZnO products with low density, and the dielectric loss tangent tanδ e increases with the increase of the Sb-doping concentration in a certain concentration range.     

Growth characteristics and properties of ZnO:Ga thin films prepared by pulsed DC magnetron sputtering

Transparent conductive ZnO:Ga thin films were deposited on Corning 1737 glass substrate by pulsed direct current (DC) magnetron sputtering. The effects of process parameters, namely pulse frequency and film thickness on the structural and optoelectronic properties of ZnO:Ga thin films are evaluated. It shows that highly c-axis (0 0 2) oriented polycrystalline films with good visible transparency and electrical conductivity were prepared at a pulsed frequency of 10 kHz. Increasing the film thickness also enlarged the grain size and carrier mobility which will subsequently lead to the decrease in resistivity. In summary, ZnO:Ga thin film with the lowest electrical resistivity of 2.01 × 10⁻⁴ Ω cm was obtained at a pulse frequency of 10 kHz with 500 nm in thickness. The surface RMS (root mean square) roughness of the film is 2.9 nm with visible transmittance around 86% and optical band gap of 3.83 eV.     

Effect of Sb-doping on the morphology and the dielectric properties of chrysanthemum-like ZnO nanowire clusters

Chrysanthemum-like ZnO nanowire clusters with different Sb-doping concentrations were prepared by using the hydrothermal process. The microstructures, morphologies, and dielectric properties of the as-prepared products were characterized by X-ray diffraction (XRD), high-resolution transmission electron microscopy (HRTEM), field emission environment scanning electron microscope (FEESEM), and microwave vector network analyzer respectively. The results indicate that the as-prepared products are Sb-doped ZnO single crystallines with hexagonal wurtzite structure, the flower bud saturation degree F_d is obviously different from that of the pure ZnO nanowire clusters, the good dielectric loss property is found in Sb-doped ZnO products with low density, and the dielectric loss tangent tanδ _e increases with the increase of the Sb-doping concentration in a certain concentration range.     

Improvement of sintering,nonlinear electrical,and dielectric properties of ZnO-based varistors doped with TiO_2

The effects of TiO_2 on sintering and nonlinear electrical properties of(98.5-x)ZnO–0.5MnO_2–0.5Co_2O_3-0.5Bi_2O_(3–x)TiO_2(x = 0.3,0.5,0.7,0.9 mol%) ceramic varistors prepared by the ceramic technique are investigated in this work.The optimum sintering temperature of the prepared samples is deduced by determining the firing shrinkage and water absorption percentages.The optimum sintering temperature is found to be 1200℃,at which each of the samples shows a maximum firing shrinkage and minimum water absorption.Also minimum water absorption appears in a sample of x = 0.9 mol%.Higher sintering temperature and longer sintering time give rise to a reduction in bulk density due to the increased amount of porosity between the large grains of ZnO resulting from the rapid grain growth induced by the liquid phase sintering.The crystal size of ZnO decreases with increasing TiO_2 doping.The addition of TiO_2 improves the nonlinear coefficient and attains its maximum value at x = 0.7 mol% of TiO_2,further addition negatively affects it.A decrease in capacitance consequently in the dielectric constant is recorded with increasing the frequency in a range of 30 kHz–200 kHz.The temperature and composition dependences of the dielectric constant and AC conductivity are also studied.The increase of temperature raises the dielectric constant because it increases ionic response to the field at any particular frequency.