Fabrication and characteristics of high-K HfO2 gate dielectrics on n-germanium

This paper reports that the high-K HfO2 gate dielectrics are fabricated on n-germanium substrates by sputtering Hf on Ge and following by a furnace annealing. The impacts of sputtering ambient, annealing ambient and annealing temperature on the electrical properties of high-K HfO2 gate dielectrics on germanium substrates are investigated. Experimental results indicate that high-K HfO2 gate dielectrics on germanium substrates with good electrical characteristics are obtained, the electrical properties of high-K HfO2 gate dielectrics is strongly correlated with sputtering ambient, annealing ambient and annealing temperature.     

optical, Structural and Laser-Induced Damage Threshold Properties of HfO2 Thin Films Prepared by Electron Beam Evaporation

We prepare HfO2 thin films by electron beam evaporation technology. The samples are annealed in air after deposition. With increasing annealing temperature, it is found that the absorption of the samples decreases firstly and then increases. Also, the laser-induced damage threshold (LIDT) increases firstly and then decreases.When annealing temperature is 473 K, the sample has the highest LID T of 2.17 J/cm^2, and the lowest absorption of 18ppm. By investigating the optical and structural characteristics and their relations to LIDT, it is shown that the principal factor dominating the LIDT is absorption.     

Evidence of GeO volatilization and its effect on the characteristics of HfO2 grown on a Ge substrate

HfO2 films are deposited by atomic layer deposition(ALD) using tetrakis ethylmethylamino hafnium(TEMAH) as the hafnium precursor,while O3 or H2O is used as the oxygen precursor.After annealing at 500℃ in nitrogen,the thickness of Ge oxide's interfacial layer decreases,and the presence of GeO is observed at the H2 O-based HfO2 interface due to GeO volatilization,while it is not observed for the O3-based HfO2.The difference is attributed to the residue hydroxyl groups or H2 O molecules in H2 O-based HfO2 hydrolyzing GeO2 and forming GeO,whereas GeO is only formed by the typical reaction mechanism between GeO2 and the Ge substrate for O3-based HfO2 after annealing.The volatilization of GeO deteriorates the characteristics of the high-κ films after annealing,which has effects on the variation of valence band offset and the C-V characteristics of HfO2 /Ge after annealing.The results are confirmed by X-ray photoelectron spectroscopy(XPS) and electrical measurements.     

Influences of Annealing on Residual Stress and Structure of HfO2 Films

HfO2 films are deposited on BK7 glass substrates by electron beam evaporation. The influences of annealing between 100℃ and 400℃ on residual stresses and structures of HfO2 films are studied. It is found that little differences of spectra, residual stresses and structures are obtained after annealing at lower temperatures. After annealing at higher temperatures, the spectra shift to short wavelength, the residual stress increases with the increasing annealing temperature. At the same time, the crystallite size increases and interplanar distance decreases. The variations of optical spectra and residual stress correspond to the evolutions of structures induced by annealing.     

Wet thermal annealing effect on TaN/HfO2/Ge metal-oxide-semiconductor capacitors with and without a GeO2 passivation layer

Wet thermal annealing effects on the properties of TaN/HfO2/Ge metal-oxide-semiconductor(MOS) structures with and without a GeO2 passivation layer are investigated.The physical and the electrical properties are characterized by X-ray photoemission spectroscopy,high-resolution transmission electron microscopy,capacitance-voltage(C-V) and current-voltage characteristics.It is demonstrated that wet thermal annealing at relatively higher temperature such as 550℃ can lead to Ge incorporation in HfO2 and the partial crystallization of HfO2,which should be responsible for the serious degradation of the electrical characteristics of the TaN/HfO2/Ge MOS capacitors.However,wet thermal annealing at 400℃ can decrease the GeO x interlayer thickness at the HfO2/Ge interface,resulting in a significant reduction of the interface states and a smaller effective oxide thickness,along with the introduction of a positive charge in the dielectrics due to the hydrolyzable property of GeO x in the wet ambient.The pre-growth of a thin GeO2 passivation layer can effectively suppress the interface states and improve the C-V characteristics for the as-prepared HfO2 gated Ge MOS capacitors,but it also dissembles the benefits of wet thermal annealing to a certain extent.     

Influence of different oxidants on the band alignment of HfO₂ films deposited by atomic layer deposition

Based on X-ray photoelectron spectroscopy(XPS),influences of different oxidants on band alignment of HfO2 films deposited by atomic layer deposition(ALD) are investigated in this paper.The measured valence band offset(VBO) value for H2 O-based HfO2 increases from 3.17 eV to 3.32 eV after annealing,whereas the VBO value for O 3-based HfO2 decreases from 3.57 eV to 3.46 eV.The research results indicate that the silicate layer changes in different ways for H2 O-based and O3-based HfO2 films after the annealing process,which plays a key role in generating the internal electric field formed by the dipoles.The variations of the dipoles at the interface between the HfO2 and SiO2 after annealing may lead the VBO values of H2 O-based and O 3-based HfO2 to vary in different ways,which fits with the variation of flat band(VFB) voltage.     

Effect of annealing on structural, optical and electrical properties of ZnS/porous silicon composites

ZnS films were prepared by pulsed laser deposition (PLD) on porous silicon (PS) substrates. This paper investigates the effect of annealing temperature on the structural, morphological, optical and electrical properties of ZnS/PS composites by x-ray diffraction (XRD), scanning electron microscope (SEM), photoluminescence (PL) and I--V characteristics. It is found that the ZnS films deposited on PS substrates were grown in preferred orientation along β-ZnS (111) direction, and the intensity of diffraction peak increases with increasing annealing temperature, which is attributed to the grain growth and the enhancement of crystallinity of ZnS films. The smooth and uniform surface of the as-prepared ZnS/PS composite becomes rougher through annealing treatment, which is related to grain growth at the higher annealing temperature. With the increase of annealing temperature, the intensity of self-activated luminescence of ZnS increases, while the luminescence intensity of PS decreases, and a new green emission located around 550~nm appeared in the PL spectra of ZnS/PS composites which is ascribed to the defect-center luminescence of ZnS. The I--V characteristics of ZnS/PS heterojunctions exhibited rectifying behavior, and the forward current increases with increasing annealing temperature.     

The effect of annealing on structural,optical and electrical properties of ZnS/porous silicon composites

ZnS films were prepared by pulsed laser deposition (PLD) on porous silicon (PS) substrates. This paper investigates the effect of annealing temperature on the structural, morphological, optical and electrical properties of ZnS/PS composites by x-ray diffraction (XRD), scanning electron microscope (SEM), photoluminescence (PL) and I–V characteristics. It is found that the ZnS films deposited on PS substrates were grown in preferred orientation along β-ZnS (111) direction, and the intensity of diflraction peak increases with increasing annealing temperature, which is attributed to the grain growth and the enhancement of crystallinity of ZnS films. The smooth and uniform surface of the as-prepared ZnS/PS composite becomes rougher through annealing treatment, which is related to grain growth at the higher annealing temperature. With the increase of annealing temperature,the intensity of self-activated luminescence of ZnS increases, while the luminescence intensity of PS decreases, and a new green emission located around 550 nm appeared in the PL spectra of ZnS/PS composites which is ascribed to the defect-center luminescence of ZnS. The I-V characteristics of ZnS/PS heterojunctions exhibited rectifying behavior, and the forward current increases with increasing annealing temperature.     

Influence of different oxidants on the band alignment of HfO2 films deposited by atomic layer deposition

Based on X-ray photoelectron spectroscopy （XPS）, influences of different oxidants on band alignment of HfO2 films deposited by atomic layer deposition （ALD） are investigated in this paper. The measured valence band offset （VBO） value for H2O-based HfO2 increases from 3.17 eV to 3.32 eV after annealing, whereas the VBO value for O3-based HfO2 decreases from 3.57 eV to 3.46 eV. The research results indicate that the silicate layer changes in different ways for H2O-based and O3-based HfO2 films after the annealing process, which plays a key role in generating the internal electric field formed by the dipoles. The variations of the dipoles at the interface between the HfO2 and SiO2 after annealing may lewd the VBO values of H2O-based and O3-based HfO2 to vary in different ways, which fits with the variation of fiat band （VFB） voltage.     

Effects of annealing process on characteristics of fully transparent zinc tin oxide thin-film transistor

Annealing effect on the performance of fully transparent thin-film transistor （TTFT）, in which zinc tin oxide （ZnSnO） is used as the channel material and SiO2 as the gate insulator, is investigated. The ZnSnO active layer is deposited by radio frequency magnetron sputtering while a SiO2 gate insulator is formed by plasma-enhanced chemical vapor deposition. The saturation field-effect mobility and on/off ratio of the TTFT are improved by low temperature annealing in vacuum. Maximum saturation field-effect mobility and on/off ratio of 56.2 cm2/（V.s） and 3×10^5 are obtained, respectively. The transfer characteristics of the ZnSnO TPT are simulated using an analytical model and good agreement between measured and the calculated transfer characteristics is demonstrated.     

Stress-induced leakage current characteristics of PMOS fabricated by a new multi-deposition multi-annealing technique with full gate last process

In the process of high-k films fabrication, a novel multi deposition multi annealing(MDMA) technique is introduced to replace simple post deposition annealing. The leakage current decreases with the increase of the post deposition annealing(PDA) times. The equivalent oxide thickness(EOT) decreases when the annealing time(s) change from 1 to 2. Furthermore,the characteristics of SILC(stress-induced leakage current) for an ultra-thin SiO_2/HfO_2 gate dielectric stack are studied systematically. The increase of the PDA time(s) from 1 to 2 can decrease the defect and defect generation rate in the HK layer. However, increasing the PDA times to 4 and 7 may introduce too much oxygen, therefore the type of oxygen vacancy changes.     

Influence of multi-deposition multi-annealing on time-dependent dielectric breakdown characteristics of PMOS with high-k/metal gate last process

A multi-deposition multi-annealing technique(MDMA) is introduced into the process of high-k/metal gate MOSFET for the gate last process to effectively reduce the gate leakage and improve the device's performance. In this paper, we systematically investigate the electrical parameters and the time-dependent dielectric breakdown(TDDB) characteristics of positive channel metal oxide semiconductor(PMOS) under different MDMA process conditions, including the deposition/annealing(DA) cycles, the DA time, and the total annealing time. The results show that the increases of the number of DA cycles(from 1 to 2) and DA time(from 15 s to 30 s) can contribute to the results that the gate leakage current decreases by about one order of magnitude and that the time to fail(TTF) at 63.2% increases by about several times. However, too many DA cycles(such as 4 cycles) make the equivalent oxide thickness(EOT) increase by about 1 ?A and the TTF of PMOS worsen. Moreover, different DA times and numbers of DA cycles induce different breakdown mechanisms.     

A simulation study of field plate termination in Ga_2O_3 Schottky barrier diodes

In this work, the field plate termination is studied for Ga_2O_3 Schottky barrier diodes(SBDs) by simulation. The influence of field plate overlap, dielectric material and thickness on the termination electric field distribution are demonstrated.It is found that the optimal thickness increases with reverse bias increasing for all the three dielectrics of SiO_2, Al_2 O_3, and HfO_2. As the thickness increases, the maximum electric field intensity decreases in SiO_2 and Al_2O_3, but increases in HfO_2.Furthermore, it is found that SiO_2 and HfO_2 are suitable for the 600 V rate Ga_2O_3 SBD, and Al_2O_3 is suitable for both600 V and 1200 V rate Ga_2O_3 SBD. In addition, the comparison of Ga_2O_3 SBDs between the SiC and GaN counterpart reveals that for Ga_2O_3, the breakdown voltage bottleneck is the dielectric. While, for SiC and GaN, the bottleneck is mainly the semiconductor itself.     

AlGaN/GaN高电子迁移率晶体管肖特基高温退火机理研究

在不同应力条件下,研究了AlGaN/GaN高电子迁移率晶体管高温退火前后的电流崩塌、栅泄漏电流以及击穿电压的变化.结果表明,AlGaN/GaN高电子迁移率晶体管通过肖特基高温退火以后,器件的特性得到很大的改善.利用电镜扫描(SEM)和X射线光电子能谱(XPS)对高温退火前、后的肖特基接触界面进行深入分析,发现器件经过高温退火后,Ni和AlGaN层之间介质的去除,并且AlGaN材料表面附近的陷阱减少,使得肖特基有效势垒提高,从而提高器件的电学特性. 关键词： AlGaN/GaN高电子迁移率晶体管 肖特基接触 界面陷阱     

Impact of O_2 post oxidation annealing on the reliability of SiC/SiO_2 MOS capacitors

The effects of dry O_2 post oxidation annealing(POA) at different temperatures on SiC/SiO_2 stacks are comparatively studied in this paper. The results show interface trap density(Dit) of SiC/SiO_2 stacks, leakage current density(Jg), and time-dependent dielectric breakdown(TDDB) characteristics of the oxide, are affected by POA temperature and are closely correlated. Specifically, Dit, Jg, and inverse median lifetime of TDDB have the same trend against POA temperature, which is instructive for SiC/SiO_2 interface quality improvement. Moreover, area dependence of TDDB characteristics for gate oxide on SiC shows different electrode areas lead to same slope of TDDB Weibull curves.     

150?快速热氮化SiO2膜的击穿特性

对具有器件质量的150?厚SiO₂膜经传统的长时间热氮化和高温快速热氮化后,研究了其击穿特性及其在高场强下的耐久力。研究结果表明,氮化后击穿场强的分布变窄,对栅电极面积的依赖性减弱,最大击穿场强略微下降。热氮化对高电场下SiO₂/Si界面稳定性和决定于时间的介质击穿均有改善。这种改善既取决于所加栅电压的极性,又强烈依赖于氮化工艺条件。根据电流传输机构,本文提出一种考虑了电荷积累、陷阱密度及其重心位置的击穿模型。 关键词：     

衬底温度对HfO_2薄膜结构和光学性能的影响

采用直流磁控反应溅射法,分别在室温,200,300,400和500℃下制备了HfO2薄膜。利用X射线衍射(XRD)、椭圆偏振光谱(SE)和紫外可见光谱(UVvis)研究了衬底温度对HfO2薄膜的晶体结构和光学性能的影响。XRD研究结果显示:不同衬底温度下制备的HfO2薄膜均为单斜多晶结构;随衬底温度的升高,(-111)面择优生长更加明显,薄膜中晶粒尺寸增大。SE和UVvis研究结果表明:随衬底温度升高,薄膜折射率增加,光学带隙变小;制备的HfO2薄膜在250～850nm范围内有良好的透过性能,透过率在80%以上。     

NiSi金属栅电学特性的热稳定性研究

研究了NiSi金属栅的各种电学特性及其热稳定性，提出一个物理模型用于解释当形成温度大于500 ℃时NiSi功函数随退火温度升高而增大的现象.测量了不同退火温度形成的NiSi材料的方块电阻，当退火温度大于400 ℃时，方块电阻达到最小，并在400—600 ℃范围内稳定.比较各种温度下形成的NiSi材料X射线衍射谱的变化，说明温度在400—600 ℃范围内NiSi相为最主要的成分.制备了以NiSi为金属栅的金属氧化物半导体电容.通过等效氧化层电荷密度及击穿电场E_bd的分布研 关键词： 金属栅 NiSi 炉退火 快速热退火     

沉积温度对HfO2薄膜残余应力的影响

 用电子束蒸发方法制备了HfO₂薄膜，根据镀膜前后基片曲率半径的变化，用Stoney公式计算了薄膜应力，讨论了沉积温度对薄膜残余应力的影响。结果发现，HfO₂薄膜的残余应力均为张应力，应力值随沉积温度的升高先增大后减小，在280 ℃左右出现极大值。对样品进行了XRD测试，从微观结构上对实验结果进行了分析，发现微结构演变引起的内应力变化是引起薄膜残余应力改变的主要因素，HfO2薄膜在所选沉积温度60~350 ℃内出现了晶态转变，堆积密度随温度升高而增大。