基于有效布尔矩阵的线性最近邻量子电路综合?

量子电路要求满足最近邻约束，只允许在相邻的量子位之间交互，线性量子电路是量子电路的一个重要部分。研究了表示线性最近邻量子电路的布尔矩阵有效性的快速判定方法，时间复杂度从n!(n-1)变为O(n2)。提出了基于有效布尔矩阵的大规模线性最近邻量子电路的并行综合算法，对128线的任意线性最近邻量子电路在不到10 s内完成了电路综合。提出的并行方法不仅保证了精度，也大大减少了量子电路的综合时间，扩大了求解电路的规模。     

基于矩阵变换的线性最近邻量子线路综合与优化

为了构造线性最近邻量子线路,降低线性量子可逆线路的量子代价,提出了一种基于矩阵变换的线性量子线路综合与优化方法.该方法给出了线路的矩阵表示和基于矩阵的近邻CNOT（Controlled NOT Gate）门判定,并提出矩阵分组的最佳方案,保证了线路综合中CNOT门数量最优.为了实现量子线路近邻化,提出了swap门的矩阵表示及线路近邻化规则,证明了两种swap门添加方式的等效性;提出了不同情况下swap门的消除规则,降低了近邻化后量子线路的量子代价.选择benchmark例题库中具有代表性的线路进行实验,与已有的量子线路近邻化算法相比,线路量子代价平均优化率为34.31%.     

基于新型量子逻辑门库的最优NCV三量子电路快速综合算法

许多量子电路综合算法由于指数级时间与空间复杂度,只能用可逆逻辑门综合3量子逻辑电路,仅有少数算法实现用量子非门,控制非门,控制V门与控制V⁺门(NCV)综合3量子逻辑电路,主要方法是将电路综合问题简化为四值逻辑综合问题.本文提出用NCV门构造新型量子逻辑门库,该库与NCV门库在综合最优3量子逻辑电路上等价,因此又可将四值逻辑综合问题进一步简化为更易求解的二值逻辑综合问题,使用基于完备Hash函数的3量子电路快速综合算法,快速生成全部最优的3量子逻辑电路,以最小代价综合电路的平均速度是目前最好结果Maslov 2007的近127倍.     

用基本两位量子逻辑门实现N位量子逻辑门的研究

量子电路是实现量子态幺正演化的手段,一位和两位门是构成量子电路的基础。Barenco 用基本的两位量子逻辑门实现n位量子逻辑门功能,张登玉在Barenco的工作基础上对用基本的两位量子逻辑门实现n位量子逻辑门功能进行了改进。通过对Barenco方案和张登玉方案的分析和研究,提出了一个用基本的两位量子逻辑门实现n位量子逻辑门功能的新方案,该方案结构更简单,且所用的两位门更易于实现,同时指出和改正了张文的不太准确的结论。     

基于NCV门的量子电路故障的检测与定位研究

为了确保基于NCV门库的量子电路的正确性和有效性,给出了量子电路故障定位树的生成算法和量子电路黑盒检测算法来定位量子电路中的门丢失故障。该故障定位树算法去除约98%的无用输出向量,提取输出表中有效的输入向量以及对应的故障输出向量,逐层生成故障定位树。结合量子电路黑盒检测算法对量子电路进行故障定位时不需要访问输出表就能够有效定位量子电路中的丢失门。对benchmarks部分电路进行实验,结果验证了该算法定位单故障门的有效性。     

非可逆逻辑门的量子可逆实现研究

逻辑关系可用逻辑函数表示,量子逻辑关系是可逆的,引入和定义了量子逻辑函数;通过引入辅助量子位,增添量子输出信号的区分位,完成对非可逆逻辑门的改造,使非可逆逻辑门在量子电路中得到可逆实现,并研究了一些有用的非可逆逻辑门的改造方法,给出可实现的优化后的量子电路。     

关于量子非局域逻辑门的研究

对几种类型的量子非局域逻辑门进行了讨论,并且研究了信道为非最大纠缠态的情况,此时量子非局域控制-非门只能概率性实现.     

基于NCV门库的可逆逻辑门进化设计与优化

提出和实现了一种基于遗传算法的可逆逻辑门的设计方法。其特点是预先求出并存储所需功能的可逆逻辑门的真值表,并对NCV基本门库中的控制V门,控制V+门,控制非门,非门进行编码,通过这些基本门的级联,构成染色体暨可逆逻辑门,在逐代进化中按照既定逻辑功能和优化目标进行适应度评估,再利用遗传换代中的选择,交叉,变异等功能进行遗传操作,进而找到功能和性能均符合预定目标的可逆逻辑门。实验结果证明,此方法的可行性、有效性,与传统手工设计可逆逻辑门相比,其在求解速度和能力方面有显著提高。     

基于MCT可逆线路的量子线路近邻化排布

为了实现量子线路线性最近邻（LNN）排布,给出了可逆MCT门的最近邻Toffoli门级联方法.为了解决线路近邻化中额外插入的SWAP门增加量子代价的问题,引入NNTS门减少插入的SWAP门数,并给出了MCT门基于NNTS门的最近邻线路排布.提出了量子线路近邻化排布算法,将多控制MCT门通过交换线路的顺序得到其最近邻线路排布,然后将每个NNTS门替换为其最优的LNN量子线路实现,得到该MCT线路的LNN量子线路,该方法可以减少量子线路的长度和量子代价.通过Benchmark例题测试,并与现有的线路近邻化结果进行比较,所需插入的SWAP门数平均减少42.83%,量子代价平均改善率达14.80%.     

量子逻辑电路故障检测定位及自修复方法研究

针对量子逻辑电路规模逐渐增大,电路可靠性逐渐下降的问题,提出基于单个量子逻辑门在线故障检测定位方法,该方法使用新构造的检测信号生成门与故障检测门,利用奇偶保持特性判断待测量子逻辑门是否发生故障,同时在设计过程中对信号检测电路进行检验,保证检测电路的正确性。此外提出了基于硬件冗余的量子逻辑电路自修复设计方法。实验结果表明,文中故障检测方法在量子门和垃圾位等性能指标上相对已有方法均有了改进,首次实现的量子逻辑电路的自修复设计大大提高了电路的容错能力和可靠性。     

An ant colony based mapping of quantum circuits to nearest neighbor architectures

Although this decade is witnessing tremendous advancements in fabrication technologies for quantum circuits, this industry is facing several design challenges and technological constraints. Nearest Neighbor (NN) enforcement is one such design constraint that demands the physical qubits to be adjacent. In the last couple of years, this domain has made progress starting from designing advanced algorithms to improved synthesis methodologies, even though developing efficient design solutions remains an active area of research.Here, we propose such a synthesis technique that efficiently transforms quantum circuits to NN designs. To find the NN solution, we have taken help of an ant colony algorithm which completes the circuit conversion in two phases: in the first phase, it finds the global qubit ordering for the input circuit and, in the second phase, a heuristic driven look-ahead scheme is executed for local reordering of gates. The proposed algorithm is first fitted into a 1D design and, later, mapped to 2D and 3D configurations. The combination of such heuristic and the meta-heuristic schemes has resulted promising solutions in the transformation of quantum circuits to NN-compliant architectures. We have tested our algorithm over a wide spectrum of benchmarks and comparisons with state-of-the-art design approaches showed considerable improvements.     

基于遗传算法的量子可逆逻辑电路综合方法研究

量子可逆逻辑电路综合主要是研究在给定的量子门和量子电路的约束条件及限制下,找到最小或较小的量子代价实现所需量子逻辑功能的电路。把量子逻辑门的功能用矩阵的数学模型表示,用遗传算法作全局搜索工具,将遗传算法应用于量子可逆逻辑电路综合,是一种全新的可逆逻辑电路综合方法,实现了合成、优化同步进行。四阶量子电路实验已取得了很好的效果,并进一步分析了此方法在高阶量子电路综合问题上的应用前景。     

An improved heuristic technique for nearest neighbor realization of quantum circuits in 2D architecture

Last couple of years has witnessed tremendous advancements in the field of quantum computing and even it has started providing technological footprints in the design industry. Though advancements in the physical implementation of quantum circuits has taken a giant leap but it has faced with several design challenges and one such design constraint is Nearest Neighbor (NN) criteria which demands the operating qubits of the quantum gates to be adjacent.Focusing on the design issue, here, we show a heuristic design technique for efficient transformation of quantum circuits to NN based designs in 2D configuration. Our entire strategy is based on initial qubit mapping policy, where we have introduced three different mapping techniques 1) Influence Index, 2) Adjacency Matrix and 3) Distance Ratio based strategy. After placing the qubits in appropriate positions, we also undertake a dynamic windowing based local reordering scheme to further reduce the SWAP requirement in the designs. At the end of the work, to check the effectiveness of our transformation algorithms, we have tested a wide range of benchmarks over our algorithms and a comparative study over state-of-the-art design techniques also has been undertaken.     

Exact synthesis of three-qubit quantum circuits from non-binary quantum gates

Because of recent nano-technological advances, nano-structured systems have become highly ordered, making it quantum computing schemas possible. We propose an approach to optimally synthesise quantum circuits from non-permutative quantum gates such as controlled-square-root-of-not (i.e., controlled-V). Our approach reduces the synthesis problem to multiple-valued optimisation and uses group theory. We devise a novel technique that transforms the quantum logic synthesis problem from a multi-valued constrained optimisation problem to a permutable representation. The transformation enables us to use group theory to exploit the symmetric properties of the synthesis problem. Assuming a cost of one for each two-qubit gate, we found all reversible circuits with quantum costs of 4, 5, 6, etc., and give another algorithm to realise these reversible circuits with quantum gates. The approach can be used for both binary permutative deterministic circuits and probabilistic circuits such as controlled random-number generators and hidden Markov models.     

Computational analysis and comparison of reversible gates for design and test of logic circuits

Quantum computing is one of the most significant anticipation towards the accomplishment of interminable consumer demands of small, high speed, and low-power operable electronics devices. As reversible logic circuits have direct applicability to quantum circuits, design and synthesis of these circuits are finding grounds for emerging nano-technologies of quantum computing. Multiple Controlled Toffoli (MCT) and Multiple Controlled Fredkin (MCF) are the fundamental reversible gates that playing key role in this phase of development. A number of special reversible gates have also been presented so far, which were claimed superior for providing certain purposes like logic development and testing. This paper critically analyses a range of these gates to procure an optimal solution for design, synthesis and testing of reversible circuits. The experimentation is facilitated at three subsequent levels, i.e. gates properties, quantum cost and design & testability. MCT and MCF gates are found up to 50% more cost-effective than special gates at design level and 34.4% at testability level. Maximum reversibility depth (MRD) is included as a new measurement parameter for comparison. Special gates exhibit MRD up to 7 which ideally should be 1 for a system to be physically reversible as that of MCT and MCF gates.     

激光相干控制与量子计算中的逻辑门

利用激光控制分子内不同振动模态之间能量转移的几率，论证了激光相干控制能够完成某种量子逻辑门（如量子Ｆｒｅｄｋｉｎ门）的功能。