电荷俘获存储器数据保持特性第一性原理研究

本文研究HfO₂掺入Al替位Hf杂质和氧空位共同掺杂对电荷俘获型存储器存储特性的影响. HfO₂作为高介电常数材料由于具有缩小器件尺寸、提高器件性能等优势, 被广泛用于CTM的俘获层. 采用MS和VASP研究了HfO₂俘获层中掺入Al对氧空位形成能的影响. 同时计算了两种缺陷在不同距离下的相互作用能. 计算结果表明在HfO₂中掺入Al使得氧空位的形成能降低, 并且三配位氧空位的形成能比四配位氧空位的形成能降低的更多. 通过研究Al和三配位氧空位两种缺陷间不同距离的三种情况, 计算结果表明当缺陷间距为2.107 Å时, 体系的电荷俘获能最大; 量子态数最多; 布居数最小、Al–O键最长. 通过研究三种体系写入空穴后键长的变化, 得出当缺陷间距为2.107 Å时, 写入空穴后体系的Al–O键长变化最小. 以上研究结果表明, 掺入Al后可以有效提高电荷俘获型存储器的数据保持能力. 因而本文的研究为改善电荷俘获型存储器数据保持特性提供一定的理论指导.     

Al掺杂对HfO2俘获层可靠性影响第一性原理研究

采用基于MS(Materials Studio)软件和密度泛函理论的第一性原理方法, 研究了HfO₂ 俘获层的电荷俘获式存储器(Charge Trapping Memory, CTM)中电荷的保持特性以及耐擦写性. 在对单斜晶HfO₂中四配位氧空位(V_O4) 缺陷和V_O4 与Al替位Hf掺杂的共存缺陷体(Al+V_O4)两种超晶胞模型进行优化之后, 分别计算了其相互作用能、形成能、Bader电荷、态密度以及缺陷俘获能. 相互作用能和形成能的计算结果表明共存缺陷体中当两种缺陷之间的距离为2.216 Å时, 结构最稳定、缺陷最容易形成; 俘获能计算结果表明, 共存缺陷体为双性俘获, 且与V_O4缺陷相比, 俘获能显著增大; Bader电荷分析表明共存缺陷体更有利于电荷保持; 态密度的结果说明共存缺陷体对空穴的局域能影响较强; 计算两种模型擦写电子前后的能量变化表明共存缺陷体的耐擦写性明显得到了改善. 因此在HfO₂俘获层中可以通过加入Al杂质来改善存储器的保持特性和耐擦写性. 本文的研究可为改善CTM数据保持特性和耐擦写性提供一定的理论指导.     

HfO_2中影响电荷俘获型存储器的氧空位特性第一性原理研究

随着器件尺寸进一步等比例缩小,高k材料HfO2作为俘获层的电荷俘获型存储器展现了较好的耐受性和较强的存储能力,且工艺相对简单,与传统半导体工艺完全兼容,因此得到了广泛的研究.为研究HfO2中氧空位引入的缺陷能级对电荷俘获型存储器存储特性的影响,运用第一性原理计算分析了HfO2中的氧空位缺陷.通过改变缺陷超胞中的电子数模拟器件的写入和擦除操作,发现氧空位对电荷的俘获基本上不受氧空位之间距离的影响,而氧空位个数则影响对电子的俘获,氧空位数多,俘获电子的能力就强.此外,四价配位的氧空位俘获电子的能力比三价配位的氧空位大.态密度分析发现四价配位的氧空位引入深能级量子态数大,并且受氧空位之间的距离影响小,对电子的俘获概率大.结果表明,HfO2中四价配位的氧空位缺陷有利于改善电荷俘获型存储器的存储特性.     

N掺杂改善黄色磷光有机电致发光器件的效率滚降

制备结构为ITO/HAT-CN/TAPC/TCTA/POAPF\:PO-01/Bphen/LiF/Al的黄色磷光器件,其效率滚降特性符合三重态-极化子淬灭模型;接着设计了一组单电子和单空穴器件,实验结果表明:发光层内的空穴是多子且PO-01俘获空穴,被PO-01俘获的多余空穴引起的激子淬灭是导致器件在高电流密度下效率剧烈滚降的原因;采用N掺杂的方法增加电子注入,可减少发光区内多余的空穴,改善器件载流子的平衡状况,降低多余空穴引起的激子淬灭,进而改善效率滚降。     

电荷俘获存储器的过擦现象

基于密度泛函理论的第一性原理平面波超软赝势方法和VASP软件对电荷俘获存储器过擦现象进行了分析研究.通过形成能的计算,确定了含有氮空位缺陷的Si3N4和含有间隙氧缺陷的Hf O2作为研究的对象;俘获能的计算结果表明两种体系对电子的俘获能力比对空穴的大,因而对两体系擦写载流子确定为电子.分别计算了Hf O2和Si3N4擦写前后的能量、擦写前后电荷分布变化、吸附能和态密度,以说明过擦的微观机理.对能量和擦写电荷变化的研究,表明Si3N4相比于Hf O2,其可靠性较差,且Si3N4作为俘获层,在一个擦写周期后,晶胞中电子出现减少现象;界面吸附能的研究表明,Si3N4相比于Hf O2在缺陷处更容易与氧进行电子交换;最后,通过对态密度的分析表明Si3N4和Hf O2在对应的缺陷中均有缺陷能级俘获电子,前者为浅能级俘获,后者为深能级俘获.综上分析表明,Si3N4在氮空位的作用下,缺陷附近原子对电子的局域作用变弱,使得Si3N4作为俘获层时,材料本身的电子被擦出,使得擦操作时的平带偏移电压增大,导致存储器发生过擦.本文的研究结果揭示了过擦的本质,对提高电荷俘获存储器的可靠性以及存储特性有着重要的指导意义.     

纳米材料及HfO_2基存储器件的原位电子显微学研究

总结了我们将原位技术和透射电子显微学分析方法相结合,针对纳米材料和器件的结构、形貌、成分以及电势分布等物理性质的动态行为所开展的综合物性表征和分析工作.主要成果有:揭示了C_(60)纳米晶须在焦耳热作用下的结构相变路径;观察到了电荷俘获存储器中的电荷存储位置以及栅极电压诱导的氧空位缺陷;研究了阻变存储器中氧空位通道的形成过程以及导电通道的开关机理.这些成果不但有助于深入理解纳米材料和器件相关功能的物理机理,改善其工作性能,更展示了透射电子显微学在微电子领域强大的研究能力.     

一种采用Li3N掺杂电子注入层的底发射倒置结构OLED的制备

采用Li3N掺杂电子注入层Alq3∶Li3N,制作了一种结构为ITO/Alq3 Alq3∶Li3N/Alq3/NPB/MoO3/Al的倒置底发射有机发光器件.其中ITO玻璃作为透明阴极,金属Al作为顶部阳极,在ITO阴极与电子传输层之间加入Li3N n型掺杂层,改善了该器件的电子注入和传输能力|在Al阳极与空穴传输层之间加入MoO3缓冲层,降低了Al阳极与NPB之间较大的空穴注入势垒,改善了空穴注入能力.实验表明:此结构的倒置底发射有机发光器件性能可达到传统结构的常用有机发光器件如ITO/NPB/Alq3/LiF/Al的性能,完全可以满足非晶硅薄膜晶体管有源有机发光器件中驱动电路的匹配及性能要求.     

缺陷对电荷俘获存储器写速度影响

基于密度泛理论的第一性原理以及VASP软件,研究了电荷俘获存储器(CTM)中俘获层HfO2在不同缺陷下(3价氧空位(VO3)、4价氧空位(VO4)、铪空位(VHf)以及间隙掺杂氧原子(IO))对写速度的影响.对比计算了HfO2在不同缺陷下对电荷的俘获能、能带偏移值以及电荷俘获密度.计算结果表明:VO3,VO4与VHf为单性俘获,IO则是双性俘获,HfO2在VHf时俘获能最大,最有利于俘获电荷;VHf时能带偏移最小,电荷隧穿进入俘获层最容易,即隧穿时间最短;同时对电荷俘获密度进行对比,表明VHf对电荷的俘获密度最大,即电荷被俘获的概率最大.通过对CTM的写操作分析以及计算结果可知,CTM俘获层m-HfO2在VHf时的写速度比其他缺陷时的写速度快.本文的研究将为提高CTM操作速度提供理论指导.     

掺杂二氧化钛纳米管对有机电致发光性能的影响

在聚合物电致发光器件中，通过在不同功能层中掺杂二氧化钛纳米管来改善器件的性能.由于二氧化钛纳米管具有p型传导特性，可以显著增大空穴传输层中载流子的迁移率.由于二氧化钛纳米管在发光层中可以增大发光材料分子的刚性，从而减少无辐射跃迁.当把二氧化钛纳米管掺杂到空穴缓冲层中时，由于其与有机分子的强相互作用，一方面降低了空穴的传导性，同时也减少了界面淬灭发光的缺陷态的产生. 关键词： 二氧化钛纳米管 聚合物电致发光 掺杂     

蓝色荧光有机发光二极管中的激子-电荷相互作用

有机发光二极管(OLED)作为新一代显示技术已广泛商用,但蓝光有机发光二极管在效率和稳定性等方面仍存在不足,虽用磷光染料能明显地提高效率,其制作成本之高却限制了产业化发展.因此,本文对蓝色荧光有机发光二极管中的效率滚降现象进行了深入探究.首先,从稳态和瞬态两个角度研究了电子电流和空穴电流对单极器件光致发光行为的影响,表明空穴对激子的淬灭效果更显著.实验证明激子-电荷相互作用是荧光OLED中效率滚降的主要机制,且激子主要是被束缚电荷淬灭而非移动电荷.另一方面制备了不同掺杂浓度的有机发光二极管器件以探究掺杂浓度对激子-极化子相互作用的影响,得到了综合性能较好的蓝色有机荧光器件,分析表明调控发光层电荷俘获可以平衡界面堆积电荷和发光层束缚电荷对激子的淬灭.本文完善了激子-极化子淬灭的内在机制,给减缓蓝色荧光有机发光二极管的效率滚降提供了有益参考.     

The influence of bottom oxide thickness on the extraction of the trap energy distribution in SONOS (silicon-oxide-nitride-oxide-silicon) structures

The charge retention characteristics of SONOS (silicon-oxide-nitride-oxide-silicon) non-volatile memory cells at elevated temperatures were investigated. Assuming thermal excitation to be the dominant charge loss mechanism, the trap energy distribution in the nitride was determined. We present an improved model which includes the influence of subsequent tunneling of the charge carriers through the bottom oxide after being thermally emitted into the conduction band of the silicon nitride. The trap energy distribution was evaluated from samples with different bottom oxide thicknesses. Changing the oxide thickness changes the tunneling probability and in turn this reveals different parts of the trap energy distribution. Using the improved model, it was found that the calculations based on the different parts of the energy range fit together to consistently describe a full trap energy distribution.     

表面悬挂键导致硅纳米线掺杂失效机理的第一性原理研究

利用第一性原理方法, 本文计算了B/N单掺杂SiNWs, 以及含有表面悬挂键的B/N单掺杂硅纳米线的总能和电子结构, 计算结果表明, 悬挂键的出现会导致单原子掺杂失效. 能带结构分析表明, B/N掺杂的H钝化的SiNWs表现出正常的p/n特性, 而表面悬挂键(dangling binding, DB)的存在会导致p型(B原子)或者n型(N原子)掺杂失效; 其失效的原因主要是因为表面悬挂键所引入的缺陷能级俘获了n型杂质(p型杂质)所带来的电子(空穴); 利用小分子(SO₂)吸附饱和悬挂键可以起到激活杂质的作用, 进而实现Si纳米线的有效掺杂.     

55 nm硅-氧化硅-氮化硅-氧化硅-硅闪存单元的γ射线和X射线电离总剂量效应研究

基于~(60)Co-γ射线和10 keV X射线辐射源,系统地研究了55 nm硅-氧化硅-氮化硅-氧化硅-硅闪存单元的电离总剂量效应,并特别关注其电学特性退化的规律与物理机制.总剂量辐照引起闪存单元I-V特性曲线漂移、存储窗口变小和静态电流增大等电学特性的退化现象,并对其数据保持能力产生影响.编程态闪存单元的I_d-V_g曲线在辐照后显著负向漂移,而擦除态负向漂移幅度较小.对比两种射线辐照,擦除态的I_d-V_g曲线漂移方向不同.相比于擦除态,富含存储电子的编程态对总剂量辐照更为敏感;且相比于~(60)Co-γ射线,本文观测到了显著的X射线剂量增强效应.利用TCAD和Geant 4工具,从能带理论详细讨论了55 nm硅-氧化硅-氮化硅-氧化硅-硅闪存单元电离总剂量效应和损伤的物理机制,并模拟和深入分析了X射线的剂量增强效应.     

Amphoteric trap modeling of multidielectric scaled SONOS nonvolatile memory structures

We have characterized multidielectric scaled SONOS nonvolatile memory structures with the quasi-static linear voltage ramp (LVR) technique and dynamic pulse measurements. We have formulated physically-based ERASE/WRITE and retention methods with deep level amphoteric traps which capture and emit carriers to the bands in the silicon nitride film. Amphoteric trap parameters are extracted by the LVR technique. ERASE/WRITE and retention amphoteric trap model simulations agree well with the experimental dynamic pulse measurements. Experimental scaled SONOS structures have been fabricated with tunnel oxide X_OT=20 Å, nitride X_N=30 Å and blocking oxide X_OB=55 Å and demonstrated a static flatband shift of 3.6 V with ±5 V programming voltages. These structures may be used as the nonvolatile memory element in high density VLSI circuits.     

A new model for the discharge behaviour of metal-nitride-oxide-silicon (MNOS) non-volatile memory devices

A new model is presented for the discharge mechanism of MNOS memory devices. For moderate and large charge contents the discharging effect can actually be ascribed to the compensation of the stored charge by the injection from the silicon into the nitride of carriers of the opposite type.     

Modified Fowler–Nordheim tunnelling for modelling charge injection into Si3N4 in an Al/Si3N4/Si structure

Charge injection behaviours in silicon nitride of an Al/Si₃N₄/n-Si metal?Cinsulator?Csemiconductor (MIS) device are systematically studied before and after applying different high constant DC bias conditions with the aim of controlling charge accumulation in the dielectric when a high actuation voltage is applied. We found that both polarity and magnitude of charge accumulation in silicon nitride depend on the biasing direction. Charge injection from the semiconductor to the silicon nitride always dominates over charge injection from the Al electrode to the silicon nitride. Negative charge accumulation happens in silicon nitride when the Al electrode is positively biased, and positive charge accumulation occurs in silicon nitride when the Al electrode is negatively biased. The positive charge accumulation is much bigger than the negative charge accumulation under the same magnitude of stress voltage. Furthermore, the experimental results also show that the charge injection level exponentially increases with the applied voltage across the silicon nitride. These observed experimental results can be well explained by a modified Fowler?CNordheim tunnelling charge injection model, which takes into account the roles of both electrons and holes in the process of charge injection.     

Electrical and material characterization of tantalum pentoxide (Ta2O5) charge trapping layer memory

In this experiment, tantalum pentoxide (Ta₂O₅) was used in a metal/oxide/high-k Ta₂O₅/oxide/silicon (MOHOS) novel nanocrystal memory as a trapping layer. Post-annealing treatment, which can passivate defects and improve the material quality of the high-k dielectric, was applied to optimize device performance for a better memory window and faster P/E (program/erase) cycle. Material and electrical characterization techniques including X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM), and electrical measurements were performed to analyze the device under different annealing conditions. The Ta₂O₅ charge trapping layer memory annealed at 900 °C had a higher window of 3.3 V in the current-voltage (C-V) hysteresis loop, and a higher charge retention capability than the samples prepared under various annealing conditions. These higher levels were due to the higher probability of deep-level charge trapping and lower leakage current.     

Capturing properties of a threefold coordinated silicon atom in silicon nitride: Positive correlation energy model

The electronic structure and capturing properties of threefold coordinated silicon atoms (≡Si·) and the Si-Si bond in silicon nitride (Si₃N₄) were studied using the ab initio density functional theory. The results show that the previously proposed negative correlation energy (NCE) model is not applicable to Si₃N₄. The NCE model was proposed for interpreting the absence of the ESR signal for threefold coordinated silicon defects and suggested that an electron can transfer between two silicon defects. We proposed that the absence of this ESR signal is due to the creation of neutral diamagnetic Si-Si defects in Si₃N₄. This model offers the most fundamental theory for explaining the hole localization (memory) effect in silicon nitride.     

Charge retention in quantized energy levels of nanocrystals

Understanding charging mechanisms and charge retention dynamics of nanocrystal (NC) memory devices is important in optimization of device design. Capacitance spectroscopy on PECVD grown germanium NCs embedded in a silicon oxide matrix was performed. Dynamic measurements of discharge dynamics are carried out. Charge decay is modelled by assuming storage of carriers in the ground states of NCs and that the decay is dominated by direct tunnelling. Discharge rates are calculated using the theoretical model for different NC sizes and densities and are compared with experimental data. Experimental results agree well with the proposed model and suggest that charge is indeed stored in the quantized energy levels of the NCs.