共查询到20条相似文献,搜索用时 15 毫秒
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R. Aloulou P-O Lucas De Peslouan H. Mnif F. Alicalapa J. D. Lan Sun Luk M. Loulou 《International Journal of Electronics》2016,103(5):841-852
Energy Harvesting circuits are developed as an alternative solution to supply energy to autonomous sensor nodes in Wireless Sensor Networks. In this context, this paper presents a micro-power management system for multi energy sources based on a novel design of charge pump circuit to allow the total autonomy of self-powered sensors. This work proposes a low-voltage and high performance charge pump (CP) suitable for implementation in standard complementary metal oxide semiconductor (CMOS) technologies. The CP design was implemented using Cadence Virtuoso with AMS 0.35μm CMOS technology parameters. Its active area is 0.112 mm2. Consistent results were obtained between the measured findings of the chip testing and the simulation results. The circuit can operate with an 800 mV supply and generate a boosted output voltage of 2.835 V with 1 MHz as frequency. 相似文献
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A method to judge complete charger transfer is proposed for a four-transistor CMOS image sensor with a large pixel size.Based on the emission current theory,a qualitative photoresponse model is established to the preliminary prediction.Further analysis of noise for incomplete charge transfer predicts the noise variation.The test pixels were fabricated in a specialized 0.18μm CMOS image sensor process and two different processes of buried N layer implantation are compared.The trend prediction corresponds with the test results,especially as it can distinguish an unobvious incomplete charge transfer.The method helps us judge whether the charge transfer time satisfies the requirements of the readout circuit for the given process especially for pixels of a large size. 相似文献
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Jung-Chan Lee 《International Journal of Electronics》2013,100(3):273-283
In this article a new charge pump circuit is presented, which is feasible for implementation with the standard twin-well CMOS process. The proposed charge pump employs PMOS-switching dual charge-transfer paths and a simple two-phase clock. Since charge transfer switches are fully turned ON during each half of the clock cycle, they transfer charges completely from the present stage to the next stage without suffering threshold voltage drop. During one clock cycle, the pump transfers charges twice through two pumping paths which are operating alternately. Test chips have been fabricated in a 0.35-μm twin-well CMOS process. The output voltage of a 4-stage charge pump with each pumping capacitor of 7.36 pF measures 6.7 V under a 1.5 V power supply and 20 MHz clock frequency. It can supply a maximum load current of about 180 μA. Although the proposed circuit exhibits somewhat inferior performances against triple-well charge pumps using additional mask and process steps, it shows at least 60% higher voltage gain at V DD = 0.9 V, approximately 10% higher peak power efficiency at V DD = 1.5 V, much larger output current drivability and faster initial output rising than traditional twin-well charge pumps. This new pumping efficient circuit is suitable for design applications with a low-cost standard twin-well CMOS process. 相似文献
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Incomplete charge transfer in CMOS image sensor caused by Si/SiO2 interface states in the TG channel
Xi Lu Changju Liu Pinyuan Zhao Yu Zhang Bei Li Zhenzhen Zhang Jiangtao Xu 《半导体学报》2023,44(11):114104-1-114104-8
CMOS image sensors produced by the existing CMOS manufacturing process usually have difficulty achieving complete charge transfer owing to the introduction of potential barriers or Si/SiO2 interface state traps in the charge transfer path, which reduces the charge transfer efficiency and image quality. Until now, scholars have only considered mechanisms that limit charge transfer from the perspectives of potential barriers and spill back effect under high illumination condition. However, the existing models have thus far ignored the charge transfer limitation due to Si/SiO2 interface state traps in the transfer gate channel, particularly under low illumination. Therefore, this paper proposes, for the first time, an analytical model for quantifying the incomplete charge transfer caused by Si/SiO2 interface state traps in the transfer gate channel under low illumination. This model can predict the variation rules of the number of untransferred charges and charge transfer efficiency when the trap energy level follows Gaussian distribution, exponential distribution and measured distribution. The model was verified with technology computer-aided design simulations, and the results showed that the simulation results exhibit the consistency with the proposed model. 相似文献
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结合无线传感器网络现有的安全方案存在密钥管理和安全认证效率低等问题的特点,提出了无线传感器网络的轻量级安全体系和安全算法。采用门限秘密共享机制的思想解决了无线传感器网络组网中遭遇恶意节点的问题;采用轻量化ECC算法改造传统ECC算法,优化基于ECC的CPK体制的思想,在无需第三方认证中心CA的参与下,可减少认证过程中的计算开销和通信开销,密钥管理适应无线传感器网络的资源受限和传输能耗相当于计算能耗千倍等特点,安全性依赖于椭圆离散对数的指数级分解计算复杂度;并采用双向认证的方式改造,保证普通节点与簇头节点间的通信安全,抵御中间人攻击。 相似文献
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High linearity and low noise column readout chain are two key factors in CMOS image sensor. However, offset mismatch and charge sharing always exist in the conventional column wise readout implementation, even adopting the technology of correlated double sample. A simple column readout circuit with improved offset mismatch and charge sharing for CMOS image sensor is proposed in this paper. Based on the bottom plate sampling and fixed common level method, this novel design can avoid the offset nonuniformity between the two buffers. Also, the single buffer and switched capacitor technique can effectively suppress the charge sharing caused by the varied operating point. The proposed approach is experimentally verified in a 1024 × 1024 prototype chip designed and fabricated in 55 nm low power CMOS process. The measurement results show that the linear range is extended by 20%, the readout noise of bright and dark fields is reduced by 40% and 30% respectively, and the improved photo response nonuniformity is up to 1.16%. Finally, a raw sample image taken by the prototype sensor shows the excellent practical performance. 相似文献
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A G_m-C complex filter with on-chip automatic tuning for wireless sensor networks is designed and implemented using 0.18μm CMOS process.This filter is synthesized from a low-pass 5th-order Chebyshev RLC ladder filter prototype by means of capacitors and fully balanced transconductors.A conventional phase-locked loop is used to realize the on-chip automatic tuning for both center frequency and bandwidth control.The filter is centered at 2 MHz with a bandwidth of 2.4 MHz.The measured results show that the filter provides more than 45 dB image rejection while the ripple in the pass-band is less than 1.2 dB.The complete filter including on-chip tuning circuit consumes 4.9 mA with 1.8 V single supply voltage. 相似文献
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多路输出单端反激式开关电源设计 总被引:1,自引:0,他引:1
在阐述了基于TOPSwitch系列芯片设计的单片反激式开关电源原理的基础上,详细介绍了一种用于智能仪表小功率多输出AC/DC开关电源的设计方法。该电源主电路采用反激式电路,应用反馈手段和脉冲调制技术实现多路电压的稳定输出。最后,给出了实验结果。试验表明,该电源具有良好的性能。 相似文献
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本文针对相变存储器编程驱动电路,提出了一种超低输出电压纹波的开关电容型电荷泵。该电荷泵可根据输入电压的不同,自适应工作在2X/1.5X升压模式之间,以获得更高的电源转换效率。相比于传统开关电容型电荷泵,在充电阶段泵电容被充电至预先设定的电压值Vo-VDD(Vo为预期的输出电压);放电阶段,泵电容串联在输入电压VDD与输出端,通过此方法将电荷泵输出端电压稳定在Vo,并有效的降低了由于电荷分享所造成的输出纹波。在中芯国际40nm标准CMOS工艺模型下,对电路进行了仿真验证,结果表明在输入电压为1.6-2.1V,输出2.5V电压,最大负载电流为10mA,输出电压纹波低于4mV,电源效率最高可达91%。 相似文献
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A 50 kbps/ISM band (902 − 926 MHz) low power transceiver for short-range wireless sensor networks (WSN) has been designed in 0.18 μm 1-poly-6 metal CMOS technology and occupy 950 μm × 800 μm. The proposed WSN transceiver designed based on an improved version of the Amplitude-Shift Keying communication scheme has a better continuous RF modulated carrier waveform as well as does not require complex modulator/demodulator circuits. In addition, to reduce power dissipation and increase power efficiency many circuit techniques have been adopted. The power dissipation and the power efficiency of the proposed WSN transceivers are 1.58 mW and 21%, respectively. 相似文献