共查询到7条相似文献,搜索用时 0 毫秒
1.
In this work the authors describe improved solutions on automatic fully-analog uncalibrated Wheatstone bridge-based interfaces suitable for wide-range resistive sensors. The proposed topologies are enhanced and integrated interfaces, based on automatic bridge configurations, completely designed in a standard CMOS technology (AMS 0.35 μm), where Voltage Controlled Resistors (VCRs), formed by MOS transistors, have been properly tuned through the use of a suitable closed feedback loop that continuously ensures the bridge equilibrium condition. The microelectronic design has been performed through the use of symmetrical Operational Transconductance Amplifiers (OTAs) with low-voltage (2 V, single supply) and low-power (63.5 μW) characteristics, so the overall system can be fabricated in a single chip suitable for portable applications. Referring to the first configuration where only one VCR has been employed for both grounded and floating resistive sensors, Orcad PSpice simulations have confirmed the interface capability to estimate the sensor resistance for about 2.7 decades variations (430 Ω; 220 kΩ), with a relative error of about ±4%. Moreover, in the second version for an extended estimation range, the interface is able to evaluate the sensor resistance for about 6.6 decades (0.1 Ω; 400 kΩ) with a reduced relative error within (−1.5%; +4%). 相似文献
2.
A self-powering 3D integrated circuit built using an SOI CMOS process is presented. The 3D integrated circuit has three tiers connected by vertical vias through the intertier oxides. The circuit elements are a photodiode array, a charge-integrating capacitor, and a local oscillator with an output buffer, each on a separate tier. The final system size is 250 μm × 250 μm × 696 μm. Our results demonstrate the circuit as a feasible proof-of-concept 3D “system”. The photodiode array stores charge on the capacitor and powers the oscillator as designed. 相似文献
3.
This paper describes the design and prototyping of an auto-balanced contactless current sensor in standard Complementary Metal–Oxide–Semiconductor (CMOS) technology, without any additional post-processing cost. The architecture includes two high-sensitivity Hall plates with differential amplification electronics. A high common mode rejection is insured by the integrated auto-balancing system based on the use of integrated coils. When a common current is applied in the embedded coils, the integrated system provides a feedback signal to a digital control unit which in turn adjusts the biasing current of one of the Hall plates in order to balance the amplification of the two Hall plates. Designed in a standard CMOS technology, this sensor can be integrated in power control System-On-Chip requiring extremely electro-magnetically compatible current sensor. 相似文献
4.
Ndubuisi Ekekwe Author Vitae Ralph Etienne-Cummings Author Vitae Author Vitae 《Integration, the VLSI Journal》2008,41(2):297-305
This paper presents a VLSI chip, with a serial peripheral interface (SPI), that obtains position and velocity measurements from incremental optical encoder feedback. It combines period and frequency countings to provide velocity estimates with good dynamic behavior over a wide speed range (10 Hz-50 MHz). By sensing the velocity of the encoder, it reserves the computational power of a supervisory microcontroller, and subsequently enhances the performance of the total system. It is compact with lower power consumption when compared to traditional FPGA implementations. Although designed for use in the control unit of a medical robot with 34-axes and tight space and power constraints, it can be readily used in other applications. It is implemented in a 2P3 M 0.5 μm CMOS process and consumes 4.82 mW power with active area of 0.45 mm2. 相似文献
5.
M. Schrems M. Knaipp H. Enichlmair V. Vescoli R. Minixhofer E. Seebacher F. Leisenberger E. Wachmann G. Schatzberger H. Gensinger 《e & i Elektrotechnik und Informationstechnik》2008,125(4):109-117
Summary Integration of low voltage analog and logic circuits as well as high-voltage (HV) devices for operation at greater than 5
V enables Smart Power ICs used in almost any system that contains electronics. HVCMOS (High-Voltage CMOS) technologies offer
much lower process cost, if compared to BCD technologies, they enable multiple HV levels on a single chip, and need less effort
when scaling to smaller CMOS technology nodes or when integrating embedded non-volatile memory. In this work we propose a
new 0.35 μm HVCMOS technology that can overcome the previous limitations in drive currents. It can match the low HV chip sizes
(Rdson) of typical BCD processes while maintaining the low process complexity with only 2 mask level adders on top of CMOS.
We also introduce a figure of merit (FOM) for comparing HV technologies. Key elements of making this newly proposed 0.35 μm
HVCMOS so competitive to BCD technologies are discussed and a device lifetime of more than 10 years, operating temperatures
of 150 °C and ESD robustness of 4 kV HBM and higher, as well as the integration of a highly robust embedded EEPROM/Flash technology
is shown. We also provide first verification results of the scalability of the proposed 0.35 μm HVCMOS technology to 0.18
μm and beyond as well as to currents of up to 8 A.
相似文献
6.
This paper presents a high-dynamic range CMOS image sensor architecture incorporating light-controlled oscillating pixels which can act as front-end for an investigative optobionic retinal prosthesis research effort. Each pixel acts as an independent oscillator, whose frequency is proportional to the local light intensity. A 9×9 pixel array has been fabricated in the AMS CMOS opto process. Each pixel's area amounts to , each pixel photodiode area is while the array occupies . Measured results show that the sensor can achieve a linear optical dynamic range of 80 dB (from 0.24 Hz to 2.2 kHz). Its linear electrical dynamic range exceeds 134 dB (from 100 mHz to 502 kHz). The nominal power dissipation is about 50 nW per pixel. 相似文献
7.
《Microelectronics Reliability》2014,54(6-7):1355-1362
Solid State Lighting (SSL) systems, powered by light-emitting diodes (LEDs), are revolutionizing the lighting industry with energy saving and enhanced performance compared to traditional light sources. However, around 70%–80% of the electric power will still be transferred to heat. As the elevated temperature negatively affects the maximum luminous output, efficiency, light quality, reliability and the lifetime of the SSL systems, thermal management is a key design aspect for LED products. In this work, an innovative thermal management with a package, a silicon substrate with temperature sensors and a polymer based loop heat pipe (LHP) was designed, manufactured and assembled. It can supply a low and relatively stable temperature to maintain higher optical power, more luminous flux and less color shift. In a word, the novel design can provide LEDs with the efficient thermal management and temperature monitoring with reduced weight, easy fabrication, less energy consumption and better light quality. 相似文献