Al2O3绝缘栅AlGaN/GaN MOS-HEMT器件温度特性研究

采用原子层淀积(ALD)实现了10nm Al₂O₃为栅介质的高性能AlGaN/GaN金属氧化物半导体高电子迁移率晶体管(MOS-HEMT). 通过对MOS-HEMT器件和传统MES-HEMT器件室温特性的对比,验证了新型MOS-HEMT器件饱和电流和泄漏电流的优势. 通过分析MOS-HEMT器件在30—180℃之间特性的变化规律,与国内报道的传统MES-HEMT器件随温度退化程度对比,得出了器件饱和电流和跨导的退化主要是由于输运特性退化造成的,证明栅介质减小了引 关键词： 原子层淀积 AlGaN/GaN MOS-HEMT器件 温度特性     

具有阻挡层的H等离子体处理增强型p-GaN栅AlGaN/GaN HEMT研究

采用H等离子体处理p-GaN盖帽层来制备p-GaN栅AlGaN/GaN高电子迁移率晶体管(HEMT).在p-Ga N层表面上先沉积2 nm的Al₂O₃薄膜,以减少H等离子体注入p-GaN时对表面造成的损伤.经研究表明沉积Al₂O₃阻挡层的器件栅极反向泄漏电流降低了一个数量级,开关比提高了约3倍.由于栅极泄露电流的减小,关态击穿电压从410 V提高到780 V.针对栅极反向泄漏减小的现象,进行了变温IG-VG测试,验证了栅极反向泄漏电流的主导机制是二维变程跳跃(Two-dimensional variable range hopping,2D-VRH)模型.分析了减小栅极反向电流的原因是由于Al₂O₃阻挡层改变了HR-Ga N的表面态,使陷阱能级的活化能升高.此外,器件动态特性也表现出更稳定的趋势,这是Al₂O₃薄膜阻挡过多的H等离子体的注入,使AlGaN势垒和沟道陷阱态数量减少,电流崩塌效应减弱.     

不同散射机理对 Al2O3/InxGa1-xAs nMOSFET 反型沟道电子迁移率的影响

通过考虑体散射、界面电荷的库仑散射以及 Al₂O₃/In_xGa_1-xAs 界面粗糙散射等主要散射机理, 建立了以 Al₂O₃为栅介质In_xGa_1-xAs n 沟金属-氧化物-半导体场效应晶体管 (nMOSFETs) 反型沟道电子迁移率模型, 模拟结果与实验数据有好的符合. 利用该模型分析表明, 在低至中等有效电场下, 电子迁移率主要受界面电荷库仑散射的影响; 而在强场下, 电子迁移率则取决于界面粗糙度散射. 降低界面态密度, 减小 Al₂O₃/In_xGa_1-xAs 界面粗糙度, 适当提高In含量并控制沟道掺杂在合适值是提高 InGaAs nMOSFETs 反型沟道电子迁移率的主要途径. 关键词： InGaAs MOSFET 反型沟道电子迁移率 散射机理     

双轴错配应变对铁电双栅负电容晶体管性能的影响

提出了双轴错配应变调节的对称双栅负电容场效应晶体管的电学特性的解析模型,然后基于该模型对比研究了铁电层厚度和双轴错配应变分别对基于PbZr_0.5Ti_0.5O₃和CuInP₂S₆材料的两种负电容场效应晶体管的电学性能的影响.结果表明:对于基于PbZr_0.5Ti_0.5O₃的负电容场效应晶体管,当增加其铁电层厚度或施加压缩应变时,其亚阈值摆幅和导通电流得到改善,但施加拉伸应变具有相反的作用.对于基于CuInP₂S₆的负电容场效应晶体管,在增加铁电层厚度或施加拉伸应变时性能有所改善,但器件在压缩应变下是滞后的.比较两者发现,在低栅极电压下,基于CuInP₂S₆的负电容场效应晶体管比基于PbZr_0.5Ti_0.5O₃的负电容场效应晶体管表现出更好的性能.     

Ta2O5-PMMA复合栅绝缘层对OFETs性能的影响

选用五氧化二钽（Ta₂O₅）-聚甲基丙烯酸甲酯（PMMA）复合材料作为栅绝缘层制备了并五苯有机场效应晶体管（OFETs）。通过在Ta₂O₅表面旋涂一层PMMA可以降低栅绝缘层的表面粗糙度,增大其场效应晶体管的迁移率。研究了厚度在20~60 nm范围内的PMMA对复合绝缘层表面形貌、粗糙度以及器件电学性能的影响。结果表明,当PMMA厚度为40 nm时,器件的电学性能最佳。与单一的Ta₂O₅栅绝缘层器件相比,其场效迁移率由4.2×10^-2 cm²/（V·s）提高到0.31 cm²/（V·s）;栅电压增加到-20 V时,开关电流比由2.9×10²增大到2.9×10⁵。     

沟道层厚度对室温制备的In2O3薄膜晶体管器件性能的影响

在室温下采用直流磁控溅射以SiO₂/Si为衬底制备了不同沟道层厚度的底栅式In₂O₃薄膜晶体管,讨论了沟道层厚度对底栅In₂O₃薄膜晶体管的电学性能的影响。实验结果表明:器件的特性与沟道层厚度有关,最优沟道层厚度的In₂O₃薄膜晶体管为增强型,其阈值电压为2.5 V,开关电流比约为10⁶,场效应迁移率为6.2 cm²·V^-1·s^-1。     

限制电流对Ta/BaTiO3/Al2O3/ITO忆阻器的开关比和稳定性调控

利用磁控溅射技术沉积了Ta/Ba Ti O₃/Al₂O₃/ITO多层薄膜,观察到该结构中的电阻开关现象受到限制电流的调控.在限制电流大小为10^–2 A时,器件中的电阻开关现象达到最优. Ta/Ba Ti O₃/Al₂O₃/ITO多层薄膜的电阻开关具有良好的可重复性和稳定性.本文使用空间限制电流的传导模型对Ta/Ba Ti O₃/Al₂O₃/ITO器件中受限制电流调控的电阻开关传导机理进行了解释.     

Al2O3绝缘层的AlGaN/GaN MOSHEMT器件研究

在研制AlGaN/GaN HEMT器件的基础上,采用ALD法制备了Al₂O₃ AlGaN/GaN MOSHEMT器件.通过X射线光电子能谱测试表明在AlGaN/GaN异质结材料上成功淀积了Al₂O₃薄膜.根据对HEMT和MOSHEMT器件肖特基电容、器件输出以及转移特性的测试进行分析发现：所制备的Al₂O₃薄膜与AlGaN外延层间界面态密度较小,因而MOSHEMT器件呈现出较 关键词： 2O₃')" href="#">Al₂O₃ ALD GaN MOSHEMT     

Al2O3薄膜/纳米Ag颗粒复合结构的光吸收谱及增强Raman散射光谱研究

Al₂O₃介质薄膜与纳米Ag颗粒构成的复合结构,被应用于表面增强Raman散射探测实验中,其中Al₂O₃介质薄膜对纳米Ag颗粒的吸收谱及增强Raman散射光谱的影响被特别关注.该复合结构的光学特性表征出纳米Ag颗粒的偶极振荡特性.从光吸收谱中可以看到,其共振吸收谱随Al₂O₃介质薄膜厚度增加而在整个谱域上发生红移,表明纳米Ag颗粒的周围介电常数随Al₂O₃介质薄膜厚度的增加而增大.采用罗丹明6G作为探针原子,6个Raman特征峰的平均增益值作为表征表面增强Raman散射衬底增益程度的量度.实验结果表明,Al₂O₃介质薄膜层的引入提高了纳米Ag颗粒的衬底介电常数,并引起了散射共振的增强,从而使表面增强Raman散射强度提高. 关键词： 纳米Ag薄膜 共振吸收 表面增强Raman散射 介电常数     

TiN/Al2O3纳米多层膜的共格外延生长及超硬效应

采用多靶磁控溅射法制备了一系列具有不同Al₂O₃调制层厚度的TiN/Al₂O₃纳米多层膜. 利用X射线能量色散谱、X射线衍射、扫描电子显微镜、高分辨透射电子显微镜和微力学探针表征了多层膜的成分、微结构和力学性能. 研究结果表明，在TiN/Al₂O₃纳米多层膜中，单层膜时以非晶态存在的Al₂O₃层在厚度小于1.5 nm时因TiN晶体层的模板效应而晶化，并与TiN层形成共格外延生长，相应地，多层膜产生硬度明显升高的超硬效应，最高硬度可达37.9 GPa. 进一步增加多层膜中Al₂O₃调制层的层厚度，Al₂O₃层逐渐形成非晶结构并破坏了多层膜的共格外延生长，使得多层膜的硬度逐步降低. 关键词： 2O₃纳米多层膜')" href="#">TiN/Al₂O₃纳米多层膜 外延生长 非晶晶化 超硬效应     

The electrical characteristics of a 4H-silicon carbide metal-insulator-semiconductor structure with Al2O3 as the gate dielectric

A 4H-silicon carbide metal-insulator-semiconductor structure with ultra-thin Al₂O₃ as the gate dielectric, deposited by atomic layer deposition on the epitaxial layer of a 4H-SiC (0001) 8⁰N-/N+ substrate, has been fabricated. The experimental results indicate that the prepared ultra-thin Al₂O₃ gate dielectric exhibits good physical and electrical characteristics, including a high breakdown electrical field of 25 MV/cm, excellent interface properties (1×10¹⁴ cm^-2) and low gate-leakage current (I_G = 1 × 10^-3 A/cm^-2@E_ox = 8 MV/cm). Analysis of the current conduction mechanism on the deposited Al₂O₃ gate dielectric was also systematically performed. The confirmed conduction mechanisms consisted of Fowler-Nordheim (FN) tunneling, the Frenkel-Poole mechanism, direct tunneling and Schottky emission, and the dominant current conduction mechanism depends on the applied electrical field. When the gate leakage current mechanism is dominated by FN tunneling, the barrier height of SiC/Al₂O₃ is 1.4 eV, which can meet the requirements of silicon carbide metal-insulator-semiconductor transistor devices.     

Synthesis,characterization and radiation damage studies of high-k dielectric (HfO2) films for MOS device applications

The current trend in miniaturization of metal oxide semiconductor devices needs high-k dielectric materials as gate dielectrics. Among all the high-k dielectric materials, HfO₂ enticed the most attention, and it has already been introduced as a new gate dielectric by the semiconductor industry. High dielectric constant (HfO₂) films (10?nm) were deposited on Si substrates using the e-beam evaporation technique. These samples were characterized by various structural and electrical characterization techniques. Rutherford backscattering spectrometry, X-ray reflectivity, and energy-dispersive X-ray analysis measurements were performed to determine the thickness and stoichiometry of these films. The results obtained from various measurements are found to be consistent with each other. These samples were further characterized by I–V (leakage current) and C–V measurements after depositing suitable metal contacts. A significant decrease in the leakage current and the corresponding increase in device capacitance are observed when these samples were annealed in oxygen atmosphere. Furthermore, we have studied the influence of gamma irradiation on the electrical properties of these films as a function of the irradiation dose. The observed increase in the leakage current accompanied by changes in various other parameters, such as accumulation capacitance, inversion capacitance, flat band voltage, mid-gap voltage, etc., indicates the presence of various types of defects in irradiated samples.     

Investigation of 4H—SiC metal—insulation—semiconductor structure with Al2O3/SiO2 stacked dielectric

Atomic layer deposited (ALD) Al₂O₃/dry-oxidized ultrathin SiO₂ films as high-k gate dielectric grown on the 8° off-axis 4H-SiC (0001) epitaxial wafers are investigated in this paper. The metal-insulation-semiconductor (MIS) capacitors, respectively with different gate dielectric stacks (Al₂O₃/SiO₂, Al₂O₃, and SiO₂) are fabricated and compared with each other. The I-V measurements show that the Al₂O₃/SiO₂ stack has a high breakdown field ( ≥ 12 MV/cm) comparable to SiO₂, and a relatively low gate leakage current of 1× 10^-7 A/cm² at electric field of 4 MV/cm comparable to Al₂O₃. The 1-MHz high frequency C-V measurements exhibit that the Al₂O₃/SiO₂ stack has a smaller positive flat-band voltage shift and hysteresis voltage, indicating less effective charge and slow-trap density near the interface.     

A study of GaN MOSFETs with atomic-layer-deposited Al2O3 as the gate dielectric

Accumulation-type GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) with atomic-layer-deposited Al₂O₃ gate dielectrics are fabricated. The device, with atomic-layer-deposited Al₂O₃ as the gate dielectric, presents a drain current of 260 mA/mm and a broad maximum transconductance of 34 mS/mm, which are better than those reported previously with Al₂O₃ as the gate dielectric. Furthermore, the device shows negligible current collapse in a wide range of bias voltages, owing to the effective passivation of the GaN surface by the Al₂O₃ film. The gate drain breakdown voltage is found to be about 59.5 V, and in addition the channel mobility of the n-GaN layer is about 380 cm²/Vs, which is consistent with the Hall result, and it is not degraded by atomic-layer-deposition Al₂O₃ growth and device fabrication.     

Electrical characteristics of polycrystalline Si layers embedded into high-k Al2O3 gate layers

The electrical characteristics of polycrystalline Si (poly Si) layers embedded into high-k Al₂O₃ (alumina) gate layers are investigated in this work. The capacitance versus voltage (C-V) curves obtained from the metal-alumina-polysilicon-alumina-silicon (MASAS) capacitors exhibit significant threshold voltage shifts, and the width of their hysteresis window is dependent on the range of the voltage sweep. The counterclockwise hysteresis observed in the C-V curves indicates that electrons originating from the p-type Si substrate in the inversion condition are trapped in the floating gate layer consisting of the poly Si layer present between the top and bottom Al₂O₃ layers in the MASAS capacitor. Also, current versus voltage (I-V) measurements are performed to examine the electrical characteristics of the fabricated capacitors. The I-V measurements reveal that our MASAS capacitors show a very low leakage current density, compared to the previously reported results.     

Temperature-dependent current conduction mechanism and charge trapping in Ta2O5 RF-sputtered on GaN

A gallium nitride (GaN) based Metal-Oxide-Semiconductor (MOS) capacitor was fabricated using radio frequency (RF)-sputtered tantalum oxide (Ta₂O₅) as the high-k gate dielectric. Electrical characteristics of this capacitor were evaluated via capacitance–voltage (C–V), current–voltage (I–V), and interface trap density (D_it) measurements with emphasis on the substrate temperature dependence ranging from 25 °C to 200 °C. Charge trapping and conduction mechanism in Ta₂O₅ were investigated. The experimental results suggested that higher substrate temperature rendered higher oxide capacitance, reduced gate leakage current, and lowered mid-gap interface trap density at the expenses of high border traps and high fixed oxide charges. The gate leakage current through Ta₂O₅ was found to obey the Ohm's conduction at lower gate bias and the Poole–Frenkel conduction at higher gate bias.     

Room-temperature flexible thin film transistor with high mobility

We report a room-temperature and high-mobility InGaZnO thin-film transistor on flexible substrate. To gain both high gate capacitance and low leakage current, we adopt stacked dielectric of Y₂O₃/TiO₂/Y₂O₃. This flexible IGZO TFT shows a low threshold voltage of 0.45 V, a small sub-threshold swing of 0.16 V/decade and very high field-effect mobility of 40 cm²/V. Such good performance is mainly contributed by improved gate stack structure and thickness modulation of IGZO channel that reduce the interface trap density without apparent mobility degradation.     

Growth and interfacial properties of atomic layer deposited Al0.7Ti0.3O y high-k dielectric on Ge substrate

Growth and interfacial properties of atomic layer deposited Al_0.7Ti_0.3O _y on Ge have been investigated as a potential high-k gate dielectric for future Ge-based metal oxide semiconductor devices. A sandwich structure of Al₂O₃/TiO₂ stack is proposed for Al₂O₃/TiO₂ intermixing and high-k/Ge interfacial passivation. The film thicknesses and interface microstructure are characterized by spectroscopy ellipsometry and high-resolution transmission electron microscopy. X-ray photoelectron spectrometry is used to analyze the chemical composition and bonding states, and to reveal the band alignment of high-k/Ge heterojunctions. Metal-oxide-capacitors are formed by depositing aluminum electrodes to perform capacitance–voltage measurements for electrical characteristics. All evidences show a positive prospect of employing atomic layer deposited Al_0.7Ti_0.3O _y as high-k gate dielectric for future Ge-based devices.     

Dielectric and insulating properties of SrTiO3/Si heterostructure controlled by cation concentration

SrTiO3 films with different cation concentration were deposited on Si(001)substrates by oxide molecular beam epitaxy.An amorphous layer was observed at the interface whose thickness depends on the oxygen pressure and the substrate temperature during growth.Although lowering the oxygen vacancy concentration in SrTiO3led to better insulating performance as indicated by the lowered leakage current density of the heterostructure,the dielectric performance was deteriorated because of the thickened interfacial layer that dominated the capacitance of SrTiO3/Si heterostructure.Instead of adjusting the oxygen vacancy concentration,we propose that controlling the film cation concentration is an effective way to tune the dielectric and insulating properties of SrTiO3/Si at the same time.