4W、22dB小信号增益K波段砷化镓单片微波集成功率放大器

本文报道了一种基于AlGaAs/InGaAs/GaAs pHEMT工艺的4W K波段单片微波集成功率放大器。该功放采用0.15 μm功率pHEMT工艺,并在片内实现了输入、输出端口的50欧姆阻抗匹配。当直流偏置电压为5.6V、直流偏置电流为2.6A时,该功放在19~22 GHz工作频段内可以输出4W的饱和功率,并达到22dB的小信号增益、13dB的输入回波损耗、25%的功率附加效率。     

W波段GaN单片功率放大器研制

报道了W波段GaN三级放大电路的研制结果。采用电子束直写工艺在AlGaN/GaN HEMT外延结构上制备了栅长100nm的"T"型栅结构。器件直流测试最大电流密度为1.3A/mm,最大跨导为430mS/mm;小信号测试外推其fT和fmax分别为90GHz及210GHz。采用该器件设计了三级放大电路,在75~110GHz频段内最大小信号增益为21dB。该单片在90GHz处的最大输出功率可达1.117W,PAE为13%,功率增益为11dB,输出功率密度为2.33 W/mm。     

C波段高增益低噪声放大器单片电路设计

主要介绍了C波段高增益低噪声单片放大器的设计方法和电路研制结果。电路设计基于Agilent ADS微波设计环境,采用GaAs PHEMT工艺技术实现。为了消除C波段低噪声放大器设计中在低频端产生的振荡,提出了在第三级PHEMT管的栅极和地之间放置RLC并联再串联电阻吸收网络的方法,降低了带外低频端的高增益,从而消除了多级级联低噪声放大器电路中由于低频端增益过高产生的振荡。通过电路设计与版图电磁验证相结合的方法,使本产品一次设计成功。本单片采用三级放大,工作频率为5～6GHz,噪声系数小于1.15dB,增益大于40dB,输入输出驻波比小于1.4∶1,增益平坦度ΔGp≤±0.2dB,1dB压缩点P-1≥10dBm,直流电流小于90mA。     

C波段高增益低噪声放大器单片电路设计

主要介绍了C波段高增益低噪声单片放大器的设计方法和电路研制结果。电路设计基于Agilent ADS微波设计环境,采用GaAs PHEMT工艺技术实现。为了消除C波段低噪声放大器设计中在低频端产生的振荡,提出了在第三级PHEMT管的栅极和地之间放置RLC并联再串联电阻吸收网络的方法,降低了带外低频端的高增益,从而消除了多级级联低噪声放大器电路中由于低频端增益过高产生的振荡。通过电路设计与版图电磁验证相结合的方法,使本产品一次设计成功。本单片采用三级放大,工作频率为5～6GHz,噪声系数小于1.15dB,增益大于40dB,输入输出驻波比小于1.4∶1,增益平坦度ΔGp≤±0.2dB,1dB压缩点P-1≥10dBm,直流电流小于90mA。     

W波段三路合成GaN功率放大器MMIC

基于GaNHEMT工艺,研制了一款W波段功率放大器MMIC.利用Lange耦合器将3个饱和输出功率大于1 W的单元电路进行三路片上功率合成来实现该功率放大器MMIC.该芯片的制作采用了 0.1 μm T型栅GaN HEMT技术,衬底为50 μm厚的SiC.芯片为三级级联拓扑结构,采用高低阻抗传输线、介质电容等进行匹配和偏置电路设计,实现低损耗输出,芯片尺寸为3.37 mm×3.53 mm×0.05 mm.测试结果表明,在漏源工作电压15 V、88～92 GHz频率范围内,该MMIC的线性增益大于15 dB,饱和输出功率大于3W.该MMIC具有功率大、输入输出回波损耗小及应用范围广的优势.     

C波段高增益放大器的设计

为了使放大器在C波段得到足够大的放大效果,提出了二级放大电路的设计方案,采用两个放大器串联的方式,并完成相关的设计。相关设计主要包括偏置电路、匹配电路等,在ADS环境下计算微带线的尺寸并对放大电路进行仿真。通过实际测试,达到了预期的效果。     

一种噪声系数为1.4 dB的S波段MMIC低噪声放大器

报道了一种可直接应用于无线接收系统前端的具有较低噪声系数和较高相关增益的MMIC低噪声放大器,该低噪声放大器采用0.50 μm GaAs PHEMT工艺技术制作.电路设计采用两级级联结构,为减小电路面积采用集总参数元件匹配电路,并用ADS软件仿真无源元件寄生效应.电路测试结果表明:在2.8～3.5 GHz 频段内噪声系数低于1.4 dB,同时相关增益大于25 dB,增益平坦度小于0.5 dB,输入输出反射损耗小于-10 dB.     

X波段GaN MMIC低噪声放大器设计

采用SiC衬底0.25 μm AlGaN/GaN高电子迁移率晶体管(HEMT)工艺,研制了一款X波段GaN单片微波集成电路(MMIC)低噪声放大器(LNA).放大器采用三级级联拓扑,第一级采用源极电感匹配,在确保良好的输入回波损耗的同时优化放大器噪声系数;第三级采用电阻电容串联负反馈匹配,在尽量降低噪声系数的前提下,保证良好的增益平坦度、输出端口回波损耗以及输出功率.在片测试表明,在10 V漏级电压、-2 V栅极电压偏置下,放大器静态电流为60 mA,8～12 GHz内增益为22.5 dB,增益平坦度为±1.2 dB,输入输出回波损耗均优于-11 dB,噪声系数小于1.55 dB,1 dB增益压缩点输出功率大于11.9 dBm,其芯片尺寸为2.2 mm×1.1 mm.装配测试表明,噪声系数典型值小于1.6 dB,可承受33 dBm连续波输入功率.该X波段GaN低噪声放大器与高功率放大器工艺兼容,可以实现多功能集成,具有广阔的工程应用前景.     

宽带W波段低噪声放大器的设计与制作

基于未来低功耗毫米波接收前端的应用,采用InP HEMT工艺实现了一种W波段宽带低噪声放大器.该放大器采用边缘耦合线用于级间的隔离,扇形短截线用于RF旁路,偏置网络采用薄膜电阻和扇形短截线以保持放大器的稳定性.采用3 mm噪声测试系统对单片进行在片测试.测试结果显示在80～102 GHz,噪声系数小于5 dB,相关增益大于19 dB.五级电路的栅、漏分别连在一起方便使用,芯片面积3.6 mm×1.7 mm,功耗30 mW.     

功率为16.9 dBm增益大于20 dB的InP DHBT W波段功率放大器

A two-stage MMIC power amplifier has been realized by use of a l-μm InP double heterojunction bipolar transistor(DHBT).The cascode structure,low-loss matching networks,and low-parasite cell units enhance the power gain.The optimum load impedance is determined from load-pull simulation.A coplanar waveguide transmission line is adopted for its ease of fabrication.The chip size is 1.5×1.7 mm~2 with the emitter area of 16×1μm×15μm in the output stage.Measurements show that small signal gain is more than 20 dB over 75.5-84.5 GHz and the saturated power is 16.9 dBm @ 79 GHz with gain of 15.2 dB.The high power gain makes it very suitable for medium power amplification.     

A new wideband regulated cascode amplifier with improved performance and its application

This paper presents a new high frequency Regulated Cascode (RGC) amplifier with improved performance. The split-length compensation technique is used to increase both the bandwidth and output impedance, and decrease the input impedance of the conventional RGC. The bandwidth of the proposed RGC amplifier is 5.81 GHz, which is about 2.7 GHz larger than that of simple one. The improved performance of the introduced circuit is achieved with no additional passive element and DC power dissipation. In the paper, output impedance and bandwidth of the proposed circuit are derived by using small signal analysis and have also been compared with the traditional one. In addition, a wideband high performance current mirror is designed in the work as an application of the proposed RGC structure. The bandwidth extension ratio (BWER) of the modified wideband current mirror is 1.37. The proposed circuits are designed by using TSMC 0.18 µm CMOS process and BSIM3 Level 49 device model. The circuits are simulated on Spectre simulator of Cadence to validate the analytical results obtained in the paper.     

A SiGe MMIC variable gain cascode amplifier

A silicon-germanium variable gain cascode amplifier has been developed to combine the functionality of an amplifier and an attenuator into one monolithic microwave integrated circuit (MMIC). The cascode amplifier, which was designed for a 7-11 GHz frequency range, achieved a gain of 12.5 dB, an input return loss of 7.5 dB, and an output return loss of 12.5 dB. The cascode amplifier exhibited 16 dB of gain control.     

A power-efficient improved recycling folded cascode amplifier

An improved recycling folded cascode amplifier for wide-bandwidth ΣΔ modulator is presented in this article. The proposed amplifier introduces internal positive-feedback pairs to achieve a significant boost in transconductance and DC gain without increasing power or area budget. The proposed recycling folded cascode amplifier was implemented in SMIC standard 65?nm CMOS process. Compared to other recycling folded cascode structures, simulation results show that the proposed amplifier achieves the enhancement of gain-bandwidth and DC gain with the best figure-of-merits.     

改进型折叠式共源共栅运算放大器电路的设计

在套筒式共源共栅、折叠式共源共栅运放中,折叠式共源共栅运算放大器凭借较大的输出摆幅和偏置电压的较低等优点而得到广泛运用。但是,折叠式的这些优势是以牺牲较大的功耗、较低的电流利用率而换取的。本文以提高电流利用率为着手点设计了一种改进的折叠式共源共栅运算放大器,在相同的电压和负载下改进的折叠式共源共栅运算放大器能显著提升跨导、压摆率和噪声性能。仿真结果表明在相同功耗和面积的条件下,改进的折叠式共源共栅运算放大器的单位增益带宽和压摆率是折叠式共源共栅运放的3倍。     

基于InP基HEMTs的W波段高增益低噪声放大MMIC

本文基于自主研发的InP基高电子迁移率晶体管工艺设计并制作了一款W波段单级低噪声放大单片毫米波集成电路。共源共栅拓扑结构和共面波导工艺保证了该低噪声放大器紧凑的面积和高的增益,其芯片面积为900 μm×975 μm,84 GHz-100 GHz频率范围内增益大于10 dB,95 GHz处小信号增益达到最大值为15.2 dB。根据调查对比,该单级放大电路芯片具有最高的单级增益和相对高的增益面积比。另外,该放大电路芯片在87.5 GHz处噪声系数为4.3 dB,88.8 GHz处饱和输出功率为8.03 dBm。该低噪声放大器芯片的成功研制对于构建一个W波段信号接收前端具有重要的借鉴意义。     

一种带宽为3.8GHz，增益步长为0.1dB的可编程增益放大器

A broadband programmable gain amplifier（PGA） with a small gain step and low gain error has been designed in 0.13 m CMOS technology. The PGA was implemented with open-loop architecture to provide wide bandwidth. A two-stage gain control method, which consists of a resistor ladder attenuator and an active fine gain control stage, provides the small gain step. A look-up table based gain control method is introduced in the fine gain control stage to lower the gain error.The proposedPGAshows a decibel-linear variable gainfrom4 to20 dB with a gain step of 0.1 dB and a gain error less than˙0.05 dB. The 3-dB bandwidth and maximum IIP3 are 3.8 GHz and 17 dBm, respectively.     

Erbium-doped fiber amplifier with 54 dB gain and 3.1 dB noisefigures

It is shown that for practical pump powers (<100 mW) a combination of high gain (>33 dB) and low noise figure (3 dB) cannot simultaneously be achieved with a conventional codirectionally pumped EDFA. However, using a codirectionally pumped composite EDFA incorporating an isolator overcomes the problem, and an amplifier with 51 dB (54 dB) gain and 3.1 dB noise figure (NF) for only 45 mW (93 mW) of pump power is demonstrated     

Design and analysis of DC gain and transconductance boosted recycling folded cascode OTA

A new technique for improving the transconductance and low frequency output impedance of recycling folded cascode (RFC) amplifiers is presented. This enhancement was achieved by using a positive feedback and upgrading the recycling structure. The new structure profits from better transconductance, slew rate, and DC gain in comparison with conventional folded cascode (FC) amplifier. Moreover, the input referred noise is reduced and the phase-margin improved. The enhanced amplifier, simulated in 0.18 μm CMOS technology, exhibits a DC gain enhancement of 16.3 dB as well as 115.5 MHz increase in gain bandwidth compared to conventional FC configuration. The amplifier consumes 360 μW @ 1.2 V which makes it suitable for low-voltage applications.     

A 4 W K-band GaAs MMIC power amplifier with 22 dB gain

A 4 W K-band AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) mono-lithic microwave integrated circuit (MMIC) high power amplifier (PA) is reported. This amplifier is designed to fully match for a 50 Ω input and output impedance based on the 0.15 μm power PHEMT process. Under the condition of 5.6 V and 2.6 A DC bias, the amplifier has achieved a 22 dB small-signal gain, better than a 13 dB input return loss,and 36 dBm saturation power with 25% PAE from 19 to 22 GHz.