Design and modeling of high-impedance electromagnetic surfaces for switching noise suppression in power planes

This paper presents a detailed design and modeling approach for power planes with integrated high-impedance electromagnetic surfaces (HIS). These novel power planes, which were introduced recently, have the unique ability of providing effective broadband simultaneous switching noise (SSN) mitigation. Full-wave electromagnetic simulation is used to study the impact of the geometry on the performance of these novel power planes. It is demonstrated that power planes using inductance-enhanced HIS can be designed for broadband mitigation of the SSN from the upper hundred megahertz to the gigahertz frequencies. Physics-based compact models for the unit cell of power planes with integrated HIS are developed and several of them connected in a two-dimensional array to build full models for large and multilayer power planes. The compact model offers fast analysis of power planes. As an example, we show that the full-wave simulation time of a 10/spl times/10 cm power plane with integrated HIS can be dramatically reduced from 24 to 48 h using a commercially available three-dimensional full-wave solver to less than 1 min when using the compact circuit model developed here.     

Simultaneous switching noise analysis using application specific device modeling

In this paper, we introduce an application-specific device modeling methodology to develop simple device model that accurately tracks the actual device I-V characteristics in relevant but bounded operating regions. We have specifically used a simple MOSFET model to precisely analyze the switching noises generated on a chip due to simultaneous driving of chip output pads by bulky buffer gates. Previous works in analytical modeling of simultaneous switching noises employed long-channel and /spl alpha/-power law transistor models; however, these models led to complex circuit equations that on truncation caused poor matching between manual analysis and actual simulation results. Also, in order to retain the simplicity of manual analysis, previous researchers ignored the parasitic capacitances of the bonding pads. This paper demonstrates that by using a simple application-specific transistor model, circuit equations can be solved precisely without requiring any gross approximations or model truncations, even when the inductance effects of bonding wires are simultaneously considered along with parasitic capacitances of the output pads. The analytical results derived in this paper tally with HSPICE simulation values within 3% deviations.     

PCB设计中同步开关噪声问题分析

印刷电路板设计中的同步开关噪声问题是现代高速数字电路应用的瓶颈之一。介绍了一 种在电路板上施加同步开关报文和温度应力的可靠性测试方法,该方法可以有效暴露电路 板上的同步开关噪声问题。借助噪声测试和阻抗分析手段,对一个由该方法发现的异常问 题进行了分析,通过优化去耦电容和电源平面阻抗,抑制了电路板上的同步开关噪声, 问题得到了完美解决。最后,给出了一些在PCB设计中抑制同步开关噪声的方法和建议。     

On the use of high-impedance power supplies to reduce the substrate switching noise in system-on-chips

This paper analyzes the generation and the propagation in system-on-chips of the switching noise due to embedded core logic blocks. Such disturbances contribute to degrade the performance of the other on-chip circuits and cause unwanted electromagnetic emission. These parasitic effects can be largely ascribed to the steep currents that flow into the power supply interconnects of the core logic blocks and to the parasitic coupling of the system-on-chip building blocks through the silicon substrate they share.In this work it is shown that the substrate voltage bounce due to the switching noise can be significantly attenuated if conventional low-impedance DC power supplies are replaced by high-impedance one. The effectiveness of the proposed approach is validated through computer simulations and experimental tests carried out on the digital core block of a test chip.     

Partial uniplanar compact electromagnetic bandgap combined with high-impedance surface to suppress simultaneous switching noise

Proposed is a design for a partial uniplanar compact electromagnetic bandgap (UC-EBG) structure, in conjunction with a high-impedance surface (HIS), to suppress simultaneous switching noise (SSN) over the wide frequency range 0.38-15.494-GHz. Different from the conventional methods, which use an EBG plane, the proposed structure uses only two UC-EBGs at the excitation and receiving ports to suppress SSN. This technique can be applied to sensitive circuits to maintain their power integrity. The other region maintains good signal integrity when a signal return path is referenced to an EBG plane.     

A novel power plane with integrated simultaneous switching noise mitigation capability using high impedance surface

A novel technique for suppressing power plane resonance at microwave and radio frequencies is presented. The new concept consists of replacing one of the plates of a parallel power plane pair with a high impedance surface or electromagnetic band gap structure. The combination of this technique with a wall of RC pairs extends the lower edge of the effective bandwidth to dc, and allows resonant mode suppression up to the upper edge of the band-gap. The frequency range for noise mitigation is controlled by the geometry of the HIGP structure.     

Simultaneous switching noise in on-chip CMOS power distribution networks

Simultaneous switching noise (SSN) has become an important issue in the design of the internal on-chip power distribution networks in current very large scale integration/ultra large scale integration (VLSI/ULSI) circuits. An inductive model is used to characterize the power supply rails when a transient current is generated by simultaneously switching the on-chip registers and logic gates in a synchronous CMOS VLSI/ULSI circuit. An analytical expression characterizing the SSN voltage is presented here based on a lumped inductive-resistive-capacitive RLC model. The peak value of the SSN voltage based on this analytical expression is within 10% as compared to SPICE simulations. Design constraints at both the circuit and layout levels are also discussed based on minimizing the effects of the peak value of the SSN voltage.     

Simultaneous switching noise reduction by resonant clock distribution networks

Resonant clock distribution networks are known as low-power alternatives for conventional power-hungry buffer-driven clock networks. In this paper, we investigate the simultaneous switching noise (SSN) in a resonant clock network compared to that in conventional clocking. Analytical and simulation results show that employing the clock generated by a resonant clock network reduces the SSN voltage on power supply rails. The main drawback of using a sinusoidal clock is that the short-circuit power increases in the clocked devices. This problem is also investigated and discussed analytically.     

Optimization of a cascaded structure for noise and echo cancellation using a noise filtering preprocessing

This paper deals with speech enhancement in hands-free telecommunication systems. The two major problems encountered in such contexts - noise reduction and acoustic echo cancellation - are addressed. After the presentation of the two basic cascaded structures found in the literature, we propose a new promising technique which takes advantage of the previous ones. The main objective is to get a near-end speech signal with low levels of distortion, echo and noise. The structure is tested in a real mobile environment and compared with the two others. An objective evaluation shows the improvement provided by this structure.     

Adaptive switching mean filter using conditional morphological noise detector

The adaptive switching mean (ASM) filter is proposed to remove impulse noise. The filter first identifies the corrupted pixels using conditional morphological noise detection and then removes the detected impulses using the adaptive mean filter. Simulation results indicate that the ASM filter can suppress impulse noise effectively while preserving the details in the image very well, thus providing better restoration performance than many other switching-based filters.     

Predictive-based adaptive switching median filter for impulse noise removal using neural network-based noise detector

A predictive-based adaptive switching median filter for impulse noise removal using neural network-based noise detector (PASMF) is presented. The PASMF has a noise detector stage and a noise filtering stage. The noise detector implemented using feed forward neural network detects impulse noises in the corrupted image. The filter is a modified median filter, which removes detected impulse noise from the image. In contrast to the standard median filter, the PASMF computes the median value after predicting the appropriate values for neighboring corrupted pixels of the current central pixel in the filtering window. The results show that the PASMF gives better performance visually as well as in terms of different performance measures.     

Simultaneous dual-wavelength operation in cascaded stronglygain-coupled DFB lasers

Using cascaded strongly gain-coupled (SGC) DFB lasers, simultaneous dual-wavelength operation can be obtained with better than a 40-dB side-mode suppression ratio (SMSR) under simple operating conditions at various temperatures. Dual-wavelength operation with various spacing can be achieved by grating fabrication and by simply activating the lasing section of the cascaded SGC DFB lasers. The lasing wavelengths can be tuned within several nanometers by base temperature variation and their spacing can be fine tuned by individual injection current     

Directional switching median filter using boundary discriminative noise detection by elimination

We propose an accurate and efficient noise detection algorithm for impulse noise removal, called the boundary discriminative noise detection by elimination (BDNDE), which retains the good characteristics of the BDND filter proposed by Ng and Ma (in IEEE Trans. Image Process. 15(6):1506?C1516, 2006) while suppressing noise effectively. In order to determine whether a pixel is corrupted, the algorithm first sets the minimum and maximum boundary (threshold) values based on the localized window centered on the pixel. The thresholding helps in achieving low false-alarm and miss-detection rate (even in random noise), even up to 90% noise densities. Extensive simulation results, conducted on gray scale images under a wide range (from 10 to 90%) of noise corruption, clearly demonstrate that our enhanced switching median filter gives better results compared to existing BDND median-based filters, in terms of suppressing impulse noise while preserving image details. The proposed method is algorithmically simple and faster, compared to existing BDND, and more suitable for real-time implementation and application. The new method has shown superior performance in terms of subjective quality in the filtered image as well as objective quality in the peak signal-to-noise ratio (PSNR) measurement to that of the BDND filter.     

Axial ratio improvement in aperture antennas using high-impedance ground plane

High-impedance surfaces are studied as a means of improving the radiation pattern symmetry in aperture antennas. Compared to a solid metal ground plane, the results suggest that high-impedance surfaces can significantly improve the axial ratio of circularly polarised antennas. This can be used to reduce interference between left and right polarisation components.     

Clipping noise mitigation for channel estimation in OFDM systems

This letter provides a new technique to mitigate the clipping noise on pilot symbols in clipped and pilot-aided orthogonal frequency division multiplexing (OFDM) systems. The basic principle is to directly filter the clipping noise on the positions of pilots in the frequency domain before the insertion of pilots. Simulation results show that the new technique can effectively improve channel estimation and system performance.     

基于螺旋谐振环结构的UWB同步开关噪声抑制电源平面

针对目前印制电路板中采用的同步开关噪声抑制方法抑制带宽较窄、全向性较差、电源平面有效使用面积小、结构复杂及对信号质量影响大的问题,提出了一种基于螺旋谐振环结构的超宽带同步开关噪声抑制平面,具有结构简单、阻带宽、抑制方向具有全向性、无需周期性电磁带隙结构的特点。通过研究其等效电路模型,使用三维有限元法( FEM)对所设计的结构提取了S参数,并进行了频域与时域分析与仿真。仿真结果表明：所提出的结构其同步开关噪声抑制深度在-40 dB时,阻带范围为0.13~20 GHz,抑制带宽达到19.87 GHz,有效降低了带隙中心频率;当注入噪声电压为1 V时,可将噪声电压抑制到0.25 mV;对比UC-EBG和Planar EBG结构,在-40 dB抑制深度时,抑制带宽分别提高了16.97 GHz和17.73 GHz。     

Effects of continuous noise in randomised switching DC-DCconverters

A randomly switched DC-DC converter reduces the magnitude of discrete harmonics but creates continuous noise in the output voltage. Continuous noise within the passband of the output filter is found to induce low-frequency voltage ripple in the converter output. This adverse effect is inherent in all randomised switching schemes and is confirmed by both theory and experiment     

Direct torque control with imposed switching frequency in an 11-level cascaded inverter

This paper presents the application of direct torque control in an induction motor, using a multilevel cascaded inverter with separated DC sources. The control strategy operates with imposed switching frequency, improving torque behavior. The paper studies the theoretical concepts related to this method, like vector selection, state variables estimation, and commutation time calculation. In addition, this paper presents results for a three- and eleven-level inverter-fed drives, from which it can be appreciated that the increase of levels of the load voltage reduces the torque ripple.     

Design of multivariable variable structure system for nonlinear time-varying systems using nonlinear switching surfaces

Using nonlinear switching surfaces, a multivariable variable structure system (VSS) for nonlinear time-varying systems in the presence of disturbances and parameter variations is proposed. In the previous sliding mode control, the switching surfaces are linear functions and therefore the speed of response is relatively low. To overcome this problem, the proposed method improves the speed of response and good transient response is thus obtained. An example has shown its effectiveness in controlling nonlinear time-varying systems.<>