A novel LDMOS with a junction field plate and a partial N-buried layer |
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| Affiliation: | a State Key Laboratory of Electronic Thin Films and Integrated Devices. University of Electronic Science and Technology of China, Chengdu 610054, China;b Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China |
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| Abstract: | A novel lateral double-diffused metal–oxide semiconductor (LDMOS) with a high breakdown voltage (BV) and low specific on-resistance (Ron.sp) is proposed and investigated by simulation. It features a junction field plate (JFP) over the drift region and a partial N-buried layer (PNB) in the P-substrate. The JFP not only smoothes the surface electric field (E-field), but also brings in charge compensation between the JFP and the N-drift region, which increases the doping concentration of the N-drift region. The PNB reshapes the equipotential contours, and thus reduces the E-field peak on the drain side and increases that on the source side. Moreover, the PNB extends the depletion width in the substrate by introducing an additional vertical diode, resulting in a significant improvement on the vertical BV. Compared with the conventional LDMOS with the same dimensional parameters, the novel LDMOS has an increase in BV value by 67.4%, and a reduction in Ron.sp by 45.7% simultaneously. |
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| Keywords: | junction field plate partial N-buried layer specific on-resistance breakdown voltage |
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