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Trigger mechanism of PDSOI NMOS devices for ESD protection operating under elevated temperatures |
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| Affiliation: | 1.Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;2.Key Laboratory of Science and Technology on Silicon Devices, Chinese Academy of Sciences, Beijing 100029, China;3.University of Chinese Academy of Sciences, Beijing 100029, China |
| Abstract: | Trigger characteristics of electrostatic discharge (ESD) protecting devices operating under various ambient temperatures ranging from 30 ℃ to 195 ℃ are investigated. The studied ESD protecting devices are the H-gate NMOS transistors fabricated with a 0.18-μm partially depleted silicon-on-insulator (PDSOI) technology. The measurements are conducted by using a transmission line pulse (TLP) test system. The different temperature-dependent trigger characteristics of grounded-gate (GGNMOS) mode and the gate-triggered (GTNMOS) mode are analyzed in detail. The underlying physical mechanisms related to the effect of temperature on the first breakdown voltage VT1 are investigated through the assist of technology computer-aided design (TCAD) simulation. |
| Keywords: | ESD trigger voltage temperature GGNMOS GTNMOS TCAD |
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