| 基于混值系统的同步计数器 |
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| 引用本文： | 庄南,费本初.基于混值系统的同步计数器[J].宁波大学学报(理工版),1990(2). |
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| 作者姓名： | 庄南 费本初 |
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| 作者单位： | 宁波师范学院计算中心，宁波大学数学系 |
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| 摘 要： | 提出用纯二值结构的三值T触发器和普通的二值触发器一起构造混值N进制计数器的设计方案。该方案的引入,可以使N进制计数器可能产生的最大冗余态从原来的2~(m-1)-1个减少到2~(m-2)-1个(m=ln(N-1)/ln2+1])。而它的输出状态完全与普通的二值计数器相同。
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| 关 键 词： | 多值逻辑 混值系统 混值计数器 |
RESEARCH OF SYNCHRONOUS COUNTER UPON MIXED-VALUED SYSTEM |
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| Zhuang Nan.RESEARCH OF SYNCHRONOUS COUNTER UPON MIXED-VALUED SYSTEM[J].Journal of Ningbo University(Natural Science and Engineering Edition),1990(2). |
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| Authors: | Zhuang Nan |
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| Abstract: | This paper proposes the design method of a mixedvalued modulo-N synchronous counter by using both common binary flip-flops and ternary T flip-flops which has binary structure. If this design method is introduced, the maximum redundancies of modulo-N counter will be reduced from 2~(m-1)-1 to 2~(m-2)-1(where,m=ln(N-1)/ln2+1]. Furthermore, the output state of the mixed-valued counter is the same as that of binary one. |
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| Keywords: | multiple-Valued logic mixed:valued system mixed-valued counter |
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