级联式高阶Σ△M数字式闭环微机械加速度计 |
| |
引用本文: | 陈方,刘卫平,刘礼,张勇军.级联式高阶Σ△M数字式闭环微机械加速度计[J].中国惯性技术学报,2016(3):399-403. |
| |
作者姓名: | 陈方 刘卫平 刘礼 张勇军 |
| |
作者单位: | 1. 中科院上海微系统与信息技术研究所传感技术国家重点实验室,上海,200050;2. 上海航天电子通讯设备研究所,上海,201109;3. 北京科技大学高效轧制国家工程研究中心,北京,100083 |
| |
基金项目: | 国家自然科学基金资助项目(61504159) |
| |
摘 要: | 基于Sigma-delta Modulator(Σ△M)原理的数字闭环微机械加速度计不仅实现了力反馈闭环控制,同时直接完成信号的模数转换。基于全差分式电容微加速度设计了一种2-2级联式(MASH)高阶Σ△M闭环系统——MASH_(2-2),并与传统的单环路二阶、四阶Σ△M闭环系统(SD2、SD4)进行了仿真分析比较,研制了原理样机。微加速度计是基于结构层厚度50mm的SOI硅片通过DRIE刻蚀、气态HF释放等一系列微加工工艺得到,系统电路以数字化方式集成在FPGA中。常压下测试结果表明,样机的灵敏度为0.876 V/g,噪声基底为-110 d B,零偏不稳定性为20mg,静态温漂为40.8mg/℃,量程为±20 g。
|
关 键 词: | Σ△M 微机械加速度计 数字闭环 模数转换 MASH_(2-2) |
Digital closed-loop micromachined accelerometer based on cascaded multi-stage-noise-shaping Σ△M |
| |
Abstract: | Sigma-delta modulator (∑?M) interfaces are attractive for micromachined accelerometers since they combine the benefits of closed-loop feedback and analog-to-digital conversion at a relatively modest circuit cost. A 2-2 cascaded multi-stage-noise-shaping (MASH)∑?M architecture, i.e. 4th-order (MASH2-2), is designed for fully differential capacitive micro-accelerometer, and simulation comparison is made between the MASH2-2 and traditional single-loop∑?M interface (4th- and 2nd-order). Based on a silicon-on-insulator (SOI) wafer with 50mm-thickness device layer, the accelerometer is fabricated using dicing-free and dry-release processes. The hardware implementation of MASH2-2∑?M interface circuit is based on a FPGA chip and an analog circuit. Experimental results under atmospheric pressure show that the sensitivity, noise floor, bias instability, zero offset temperature drift, and input range of MASH2-2 accelerometer is 0.876V/g,-110dB, 20mg, 55.8mg/℃, and±20g, respectively. |
| |
Keywords: | ∑?M micromachined accelerometer digital closed-loop analog-to-digital conversion MASH2-2 |
本文献已被 CNKI 万方数据 等数据库收录! |
|