用A/D和FPGA实现的加速度计数据读出系统

加速度计是惯性导航系统的核心部件，通常加速度计输出为模拟电流信号，为便于导航计算机的数字处理，需经过A／D、I／F或V／F转换。针对应用背景实时、高精度、宽动态范围的要求，文中采用高分辨率模数转换器和嵌入式现场可编程门阵列组成石英挠性加速度计串行数据读出系统，设计了系统的硬件和软件。系统解决的几项关键技术，如数据采集逻辑电路设计、高分辨率A／D的接口电路设计等，可为其它要求宽动态范围的传感器接口系统所利用。

Output system of high precise & wide measuring range accelerometer

The accelerometers usually output analog signals which have to be converted by A/D, I/F or V/F in order to be processed by the navigation computer. In view of the requirements in application, such as in real time, high precision and wide dynamic range, the paper choose a high-resolution A/D converter and a field-programmable gate array to realize the high-precision accelerometer serial data acquisition system. The paper introduces the design of its hardware and the software. Several key technologies, such as data acquisition logical circuit design and high resolution A/D circuit design, can be utilized by other researches. Therefore, it can be concluded that this research makes valuable contributions to future other designs related to high resolution A/D circuit.