Influence of excess Si distribution in the gate oxide on the memory characteristics of MOSFETs |
| |
Authors: | JI Wong TP Chen M Yang Y Liu CY Ng L Ding CF Chong AA Tseng |
| |
Institution: | (1) School of Electrical & Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, 639798 Singapore, Singapore;(2) Department of Mechanical and Aerospace Engineering, Arizona State University, Tempe, AZ 85287, USA;(3) Intel Technology Sdn. Bhd., Penang, Malaysia |
| |
Abstract: | In this work, Si ions are implanted into the gate oxide of MOSFETs with different implantation schemes, followed by a high-temperature
annealing. The memory characteristics of the MOSFETs have been investigated for the following two excess Si distributions:
(1) the excess Si is distributed in a narrow layer in the gate oxide near the Si substrate; and (2) the excess Si is distributed
throughout the gate oxide. It is observed that both the excess Si distributions have good endurance of up to 106 program/erase cycles. The second excess Si distribution exhibits a better retention characteristic with less than 50% charge
loss after 10 years. In contrast, the first excess Si distribution shows a complete charge loss after 1 year.
PACS 73.22.-f; 73.63.Bd; 81.07.Bc |
| |
Keywords: | |
本文献已被 SpringerLink 等数据库收录! |
|