Thin porous anodic alumina films: Interface trap density determination

The electrical properties of thin porous alumina films in the form of MOS structures were studied with dielectric spectroscopy at room temperature. The thickness of the samples was found to be approximately 95 nm with a cross section area of 1.6×10⁻³ cm².C-V andG-V measurements were performed by applying a loop sweep voltage 2.0 V to −5.0 V. Correction to the measurements were performed by considering a series resistanceR _S and leakage currentI _DC. TheC-V results show hysteresis effects due to the presence of positive charges in porous alumina. These charges may be are attributed to the residual electrolyte during the anodization process in the sample preparation. Three distinct regions in theC-V results are observed, namely the inversion, the depletion and the accumulation regions. In the voltage region, where depletion of carriers is observed,C-f andG-f measurements were recorded in the frequency range 1 Hz to 10⁶ Hz. The conductance method was applied for the calculation of the density D_it of carriers, trapped in the interface between insulator and semiconductor, and of the response time τ_it as a function of the applied bias voltage were performed. The values obtained for D_it and τ_it are of the order of 3×10¹² eV⁻¹ cm⁻² and 10⁻³ s, respectively, and they are voltage dependent. Paper presented at the Patras Conference on Solid State Ionics — Transport Properties, Patras, Greece, Sept. 14 – 18, 2004.