基于FPGA的IRIG-B编解码设计与实现

随着系统间时间同步要求的提高,IRIG-B码被越来越多的应用于系统间的时统模块中；针对传统的单片机及专用芯片实现方法已经不能满足产品的可靠性和可移植性的问题,对基于FPGA的IRIG-B编解码设计和实现方法进行了研究；提出了一种将BCD码和二进制码之间相互转换的迭代算法；结合FPGA设计方法对IRIG-B编码和解码方法进行了研究；通过对实验方法进行仿真,结果表明该方法能够正确有效的对时间信息进行IRIG-B格式的解码和编码,并且FPGA内部的实现形式可以大大减少外部芯片及电路的使用,从而大幅提升产品的可靠性和可移植性。

Design and Implementation of IRIG-B Encoding and Decoding Based on FPGA

With the increase of the time synchronization requirements of the system, the IRIG-B code is used more and more in the time system module; in view of the traditional single chip microcomputer and special chip implementation method cannot meet the reliability and portability of the product, the design and implementation of FPGA based on IRIG-B is studied;a new iterative algorithm is presented for converting between BCD codes and binary codes; research on IRIG-B encoding and decoding method based on FPGA design method; through simulation experiments, the results show that the proposed method can correct the time information of IRIG-B format decoding and encoding, and the implementation of FPGA can greatly reduce the use of external chips and circuits, thus greatly improving the reliability and portability of the products.