| 电磁脉冲对数字信号处理器的干扰及其防护 |
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| 引用本文： | 王彦,焦红灵,车文荃,何山红,熊瑛,潘超,冯德仁.电磁脉冲对数字信号处理器的干扰及其防护[J].强激光与粒子束,2013,25(8):2173-2176. |
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| 作者姓名： | 王彦 焦红灵 车文荃 何山红 熊瑛 潘超 冯德仁 |
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| 作者单位： | 1.安徽工业大学 电气信息学院, 安徽 马鞍山 243032; |
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| 摘 要： | 为寻找有效的电磁脉冲防护加固措施，首先对电磁脉冲模拟器的干扰路径进行分析，包括数字信号处理器（DSP）与放电回路的共地耦合干扰及共网电耦合干扰，并将结构优化设计、硬件屏蔽加固措施与设置软件陷阱、开启看门狗等抗干扰措施相结合，对数字信号处理器（DSP）内核工作电压、输入/输出（I/O）端口以及显示屏等进行了干扰测试。实验结果表明，采用硬件与软件相结合的防护加固技术后，DSP主板的内核工作电压及I/O端口的干扰脉冲幅值减小，且干扰持续时间由2 s减少到400 ns，干扰脉冲获得了有效抑制。
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| 关 键 词： | 电磁脉冲 数字信号处理器 耦合 软件加固技术 防护 抗干扰 |
| 收稿时间： | 2012-12-04; |
Interference and protection of electromagnetic pulse to digital signal processor |
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| Wang Yan,Jiao Hongling,Che Wenquan,He Shanhong,Xiong Ying,Pan Chao,Fen Deren.Interference and protection of electromagnetic pulse to digital signal processor[J].High Power Laser and Particle Beams,2013,25(8):2173-2176. |
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| Authors: | Wang Yan Jiao Hongling Che Wenquan He Shanhong Xiong Ying Pan Chao Fen Deren |
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| Institution: | 1.College of Electric Engineering and Information,Anhui University of Technology,Maanshan 243032,China;2.National Key Laboratory of Trajectory,School of Electronic and Optoelectronic Technology,Nanjing University of Science and Technology,Nanjing 210094,China |
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| Abstract: | The effective electromagnetic pulse protection is studied in this paper, first the interference of electromagnetic pulse simulator path is analyzed, including the digital signal processor (DSP) and the discharge circuit of coupling interference and net electricity coupling interference. Using the structure optimization design, the hardware block reinforcement measurement and the setting of open software trap, and the watchdog anti-jamming measures, the interference test is completed such as the central processor core voltage of DSP, input/output (I/O) ports of DSP and the display screen. The experimental results show that the combination of hardware and software protection reinforcement technology is effective, and the interference pulse amplitude of DSP board I/O port and the kernel work voltage are reduced, and the interference duration is reduced from 2 μs to 400 ns. The interference pulse is effectively restrained. |
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| Keywords: | digital signal processor coupling software reinforcement technique entrench anti-interference |
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