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Comparison between N_2 and O_2 anneals on the integrity of an Al_2O_3/Si_3N_4/SiO_2/Si memory gate stack
Authors:Chu Yu-Qiong;Zhang Man-Hong;Huo Zong-Liang;Liu Ming
Abstract:In this paper the endurance characteristics and trap generation are investigated to study the effects of different postdeposition anneals(PDAs) on the integrity of an Al2O3/Si3N4/SiO2/Si memory gate stack. The flat-band voltage(Vfb)turnarounds are observed in both the programmed and erased states of the N2-PDA device. In contrast, this turnaround is observed only in the erased state of the O2-PDA device. The Vfbin the programmed state of the O2-PDA device keeps increasing with increasing program/erase(P/E) cycles. Through the analyses of endurance characteristics and the low voltage round-trip current transients, it is concluded that in both kinds of device there are an unknown type of pre-existing characteristic deep traps and P/E stress-induced positive oxide charges. In the O2-PDA device two extra types of trap are also found: the pre-existing border traps and the P/E stress-induced negative traps. Based on these four types of defects we can explain the endurance characteristics of two kinds of device. The switching property of pre-existing characteristic deep traps is also discussed.
Keywords:charge trapping memory  post deposition anneal  endurance  traps
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