The effect of annealing temperature and film thickness on the phase of pentacene on the p+-Si substrate |
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Authors: | Yuan Guang-Cai Xu Zheng Zhao Su-Ling Zhang Fu-Jun Huang Jin-Zhao Huang Jin-Ying Tian Xue-Yan and Xu Xu-Rong |
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Institution: | Institute of Optoelectronic Technology, Beijing Jiaotong
University,
Beijing 100044, China
Key Laboratory of Luminescence and Optical Information (Beijing
Jiaotong University),
Ministry of Education, Beijing 100044, China |
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Abstract: | This paper investigates the morphology and crystallization
properties of the two crystalline phases of pentacene grown by
thermal evaporation on p$^+$-Si substrates at room temperature by
the methods of atomic force microscopy and x-ray diffraction. This
kind of substrate induces a thin film phase and a triclinic phase
which are formed directly onto p$^+$-Si substrates and constitute a
layer consisting of faceted grains with a step height between
terraces of 15.8\,{\AA} (1\,\AA=0.1\,nm) and 14.9\,{\AA},
respectively. Above the critical thickness of the thin film phase,
lamellar structures are found with an increasing fraction with the
increase of the film thickness. When the film thickness is fixed,
the fraction of lamellar structures increases with the increase of
annealing temperature. These lamellar structures are identified as
the second phase with a interplanar distance of 14.9\,{\AA}
corresponding to the pentacene triclinic phase. Furthermore, the
thin film phase consisting of several micrometre sized uniformly
oriented grains at an annealing temperature of less than
80${^\circ}$C and a deposition rate of 0.6\,{\AA}/s is observed. |
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Keywords: | pentacene morphology crystalline phase thin-film transistors |
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