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积分时间可调的CCD相机驱动时序设计与实现
引用本文:周建康,陈新华,周望,沈为民.积分时间可调的CCD相机驱动时序设计与实现[J].光子学报,2008,37(11):2300-2304.
作者姓名:周建康  陈新华  周望  沈为民
作者单位:苏州大学,现代光学技术研究所,江苏省现代光学技术重点试验室,江苏,苏州,215006
基金项目:江苏省高校自然科学基金,国家高技术研究发展计划(863计划)
摘    要:在分析帧转移CCD的结构和驱动时序的基础之上,对时序关系和积分时间选择进行了计算,并给出积分时间可调的循环嵌套时序设计方案.以现场可编程逻辑门阵列为硬件载体,用硬件描述语言对方案进行设计.考虑到CCD驱动时序复杂、相位要求严格,提出运用锁相环技术进行高频信号的精确移相,用嵌入式逻辑分析仪对时序进行采样验证,在CCD电路板上实现了积分时间可调的CCD空间相机驱动时序.

关 键 词:帧转移CCD  积分时间  锁相环  嵌入式逻辑分析仪
收稿时间:2007-07-23
修稿时间:2007-09-04

Design and Implement of Timing Generator of Integral Time Adjustable CCD Camera
ZHOU Jian-kang,CHEN Xin-hua,ZHOU Wang,SHEN Wei-min.Design and Implement of Timing Generator of Integral Time Adjustable CCD Camera[J].Acta Photonica Sinica,2008,37(11):2300-2304.
Authors:ZHOU Jian-kang  CHEN Xin-hua  ZHOU Wang  SHEN Wei-min
Institution:ZHOU Jian-kang,CHEN Xin-hua,ZHOU Wang,SHEN Wei-min(Jiangsu Key Laboratory of Modern Optical Technology,Institute of Modern Optical Technology,Suzhou University,Suzhou,Jiangsu 215006,China)
Abstract:Based on the analysis of the structure and the driving timing of frame transfer CCD,its timing relationship and integral time value were calculated.Circularly embedded timing scheme that integral time could adjust flexibly was introduced.Field programmable gate array device was chosen as the hardware design platform.The schedule was designed with hardware described language.Considering strict and complex phase requirement,phase locked loop was used for precise phase shifting.Through Embedded logic analyzer the timing was sampled and verified.The driving timing generator of CCD camera with adjustable integral time was implemented on the CCD circuit board.
Keywords:Frame transfer CCD  Integral time  Phase locked loop  Embedded logic analyzer
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