基于FPGA的超高速线阵CCD信号采集系统的设计与实现

线阵CCD已广泛应用于在线检测、图像识别等系统,目前高帧率采集系统多在200~500Hz之间。高速线阵CCD采集系统,如1K甚至10KHz以上的采集要求,设计难度大,电路实现复杂,需要专用处理器,产品成本高,提出了一种采用并行高速FPGA驱动线阵CCD,通过常规分立元件完成模拟信号处理,实现数字信号实时传输的方案。该方案不仅简化了硬件设计上的难度,在同等性能情况下,可实现每秒万帧的高速采样,大幅度降低了成本。方案选用Altera FPGA作为控制核心,实现高速信号采集的同时,在片上实现一定的图像算法,不仅加速了图像处理速度,同时降低了计算机的处理压力。最后,本电路通过USB2.0接口,完成数据的实时传输。设计具有高帧率、高灵敏度、性能稳定,便携使用等特点,同时还有一定的通用性,已应用于一些光学系统中。

Design and Realization of Superspeed Linear CCD Signal Acquisition System Based on FPGA

Linear CCD has been widely used in online detection, image recognition system, etc. Present, most high frame rate acquisition system has only 200--500 Hz. For high-speed linear CCD data acquisition system, such as 1 K or 10 KH2 more collection requirements, the design is very difficult, the circuit realization is complex, it needs ASIC, so the product cost is high. A scheme is proposed which uses parallel high speed FPGA to drive linear CCD. The analog signal processing with common component is completed. The real-time digital signal transmission solutions is realized. The difficulty of hard- ware design is simplified, the high-speed collection is realized for 10 KHz under the condition of the same performance. The cost is reduced. Altera FPGA is selected as the control core to realize high speed signal acquisition. The speed of image pro- cessing is accelerated. The computer processing pressure is reduced. At last, the real-time data transmission via USB2.0 in- terface is accomplished.