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k栅介质应变Si SOI MOSFET的阈值电压解析模型
引用本文:李劲,刘红侠,李斌,曹磊,袁博.高k栅介质应变Si SOI MOSFET的阈值电压解析模型[J].物理学报,2010,59(11):8131-8136.
作者姓名:李劲  刘红侠  李斌  曹磊  袁博
作者单位:西安电子科技大学微电子学院,宽禁带半导体材料与器件教育部重点实验室,西安 710071
基金项目:国家自然科学基金(批准号: 60976068,60936055),教育部科技创新工程重大项目培育基金(批准号: 708083),教育部博士点基金(批准号: 200807010010)资助的课题.
摘    要:在结合应变Si,高k栅和SOI结构三者的优点的基础上,提出了一种新型的高k栅介质应变Si全耗尽SOI MOSFET结构.通过求解二维泊松方程建立了该新结构的二维阈值电压模型,在该模型中考虑了影响阈值电压的主要参数.分析了阈值电压与弛豫层中的Ge组分、应变Si层厚度的关系.研究结果表明阈值电压随弛豫层中Ge组分的提高和应变Si层的厚度增加而降低.此外,还分析了阈值电压与高k栅介质的介电常数和应变Si层的掺杂浓度的关系.研究结果表明阈值电压随高k介质的介 关键词: 应变Si k栅')" href="#">高k栅 短沟道效应 漏致势垒降低

关 键 词:应变Si  k  短沟道效应  漏致势垒降低
收稿时间:2009-10-27
修稿时间:2/6/2010 12:00:00 AM

Threshold voltage analytical model for strained Si SOI MOSFET with high-k dielectric
Li Jin,Liu Hong-Xia,Li Bin,Cao Lei,Yuan Bo.Threshold voltage analytical model for strained Si SOI MOSFET with high-k dielectric[J].Acta Physica Sinica,2010,59(11):8131-8136.
Authors:Li Jin  Liu Hong-Xia  Li Bin  Cao Lei  Yuan Bo
Institution:Key Laboratory for Wide Band Gap Semiconductor Materials and Devices of Education,School of Microelectronics,Xidian University,Xi'an 710071,China;Key Laboratory for Wide Band Gap Semiconductor Materials and Devices of Education,School of Microelectronics,Xidian University,Xi'an 710071,China;Key Laboratory for Wide Band Gap Semiconductor Materials and Devices of Education,School of Microelectronics,Xidian University,Xi'an 710071,China;Key Laboratory for Wide Band Gap Semiconductor Materials and Devices of Education,School of Microelectronics,Xidian University,Xi'an 710071,China;Key Laboratory for Wide Band Gap Semiconductor Materials and Devices of Education,School of Microelectronics,Xidian University,Xi'an 710071,China
Abstract:A strained Si fully depleted SOI MOSFET,which has the advantages of strained Si,high-k gate and SOI structure, is presented in this paper. A two-dimensional analytical model for the threshold voltage in strained Si fully depleted SOI MOSFET with high-k dielectric is proposed by solving Possions equation. Several important parameters are taken into account in the model. Relationships between threshold voltage,Ge Profile and thickness of strained silicon are investigated. The result shows that the threshold voltage decreases with Ge Profile and strained silicon thickness increasing. Relationships between threshold voltage,dielectric constant of high k gate and doping conceration of strained silicon are also investigated. The result shows that the threshold voltage increases with dielectric constant of high-k and doping conceration of strained silicon increasing. SCE and DIBL are analyzed finally,which also demonstrate that this novel device can suppress SCE and DIBL effect greatly.
Keywords:strained-silicon  high-k gate  short channel effect  drain induced barrier lowering
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