基于PVP和PbSe三维自组装超晶格复合体系的电双稳器件

采用旋涂工艺将PbSe三维自组装超晶格镶嵌在两层聚合物PVP中，制备了基于PVP和PbSe三维自组装超晶格复合体系的电双稳器件，器件结构为ITO/PVP/PbSe三维自组装超晶格/PVP/Al，研究了其电学性能和记忆效应。与参比器件ITO/PVP/Al相比，器件ITO/PVP/PbSe三维自组装超晶格/PVP/Al的电流-电压特性呈现出非常明显的电双稳特性和非易失记忆行为，在相同的电压下同时具有两种不同的导电状态：低电导的关态和高电导的开态。当PVP与PbSe超晶格的质量比为1：1时，器件性能最好，其最大电流开关比为7×10⁴，经过10⁴ s仍几乎无衰减。通过对电流-电压曲线拟合，利用不同的导电模型对器件的载流子传输机制进行了解释。结果表明，PbSe三维自组装超晶格作为电荷陷阱，可以俘获、储存及释放电荷，对器件的电双稳性能能起决定性作用。

Electrical Bistable Devices Based on Composites of Polyvinyl Pyrrolidone and Three Dimensional Self-assembled Lead Selenide Superlattices

Electrical bistable devices utilizing three dimensional self-assembled lead selenide (PbSe) superlattices embedded between two polyvinyl pyrrolidone (PVP) layers were fabricated by using spin-coating technique.Each PbSe superlattice is a cluster with a uniform size of 50-60 nm,which consists of hundreds of PbSe nanoparticles with an average size of 5 nm.The current-voltage characteristics for the devices with an architecture of indium-tin-oxide (ITO)/PVP/PbSe superlattices/PVP/Al exhibit electrical bistabilities and memory behaviors due to the trapping,storring,and detrapping of the PbSe superlattices.The maximum ON/OFF ratio of the current bistability for the optimal device is 7 × 104,and it is maintained for 1 × 104 s with little degradation.The electrieal bistable properties and the cartier transport mechanisms of the devices are interpreted by the conduction models based on the results of fitting the current-voltage curves.