Generation of glide split-dislocation half-loops by grain boundaries in nanocrystalline Al

A three-dimensional model for the generation of split dislocations by grain boundaries in nanocrystalline A1 is proposed. In terms of this model, rectangular glide split-dislocation half-loops nucleate at glide lattice dislocation loops pressed to grain boundaries by an applied stress. The level of the applied stress and the grain size at which the emission of such dislocation half-loops becomes energetically favorable are determined. The dependences of the stacking-fault width on the grain size and the applied stress are found. The anomalously wide stacking faults experimentally detected in nanocrystalline A1 are shown to be caused by high internal stresses forming in the stages of preparation, treatment, or local loading of nanocrystalline samples.