场发射平板显示高低压电平转换电路

提出适用于场发射高压驱动的高低压电平转换电路设计及性能分析。通过模拟,此电路可以在100V的驱动工作电压以及10mA的驱动电流条件下安全工作,最高工作频率可达20MH_z。在50pF输出负载下上升时间和下降时间分别为14,25ns。同时分析了高压CMOS器件与0.8μm标准CMOS工艺兼容过程中的厚栅氧化对于低压器件及高压N管的阈值特性影响。

A Low-high Voltage Level Shifter Circuit for FED Display Driver IC

Alow-high voltage level shifter, which is appropriate to field emission display (FED) driver IC, including its design and functions analysis is proposed. This circuit can operate safely under the conditions of 100 Vsupply and 10 mAoutput current. The maximum frequency reaches 20 MHz. The rise time and fall time of output waveform are 14 and 25 ns respectively while its load capacitance is 50 pF. The compatibility of the high voltage technology with low voltage technology is also discussed. LDMOS (Lateral-double diffused MOS) structure is used for the level shifter’s high voltage devices, HVCMOS ( High voltage CMOS) process is compatible with the standard 0.8 μm CMOStechnology which can integrate high voltage devices and low voltage devices on one chip. This process effectively decrease the production cost and increase the packing density of panel driving system.Moreover, the influences of thick gate oxide process for the High Voltage PMOSdevices during the fabricating processes on threshold of low voltage devices and high voltage NMOSFETare investigated.