基于混合技术的时序电路等价性验证

时序电路的等价性验证比组合电路更复杂,尤其是状态变量多的电路;一种有效方法是通过寄存器匹配,将部分时序电路验证转化为组合电路验证问题,降低验证的复杂度.因此,提出了一种结合多种方法的时序电路等价性验证算法,该算法结合随机仿真、局部BDD、寄存器匹配以及状态遍历.算法中的随机仿真和寄存器匹配技术能对寄存器作快速匹配,局部BDD技术减少了内存爆炸的可能,状态遍历可对电路进行最后的输出验证.实验结果表明：此算法能更快对电路进行验证.

Sequential Equivalence Checking Based on BDD

Sequential circuit checking is more difficult than combinational circuit one,especially for the circuit with a large number of Flip-Flops.One of methods to decrease the complexity of the problem is using combinational technique by Flip-Flop mapping.In this paper,we propose an algorithm in combination with many other alternative methods for sequential equivalence checking.The algorithm combines random simulation with the local BDD,Flip-Flop mapping and state traverse.Random simulation and Flip-Flop mapping facilitate to produce the fast match result,and techniques of local BDD reduce the possibility of memory overflow.The tests show that the proposed algorithm can verify the output of the circuit in a much faster fashion.