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A novel nanoscale fin field effect transistor by amended channel: Investigation and fundamental physics
Institution:1. Institut de Physique et de Chimie des Matériaux de Strasbourg, Université de Strasbourg, CNRS UMR 7504, 23 rue du Loess, BP 43, F-67034 Strasbourg Cedex 2, France;2. Freiburg Institute for Advanced Studies, Albert-Ludwigs-Universität, Albertstr. 19, D-79104 Freiburg, Germany;1. Institute of Physics, National Academy of Sciences of Ukraine, 03680 Kyiv, Ukraine;2. Research Physico-Technical Institute, State University of Nizhni Novgorod, 603950 Nizhni Novgorod, Russia;1. Centro de Física de Materiales, Centro Mixto CSIC-UPV/EHU, Paseo Manuel de Lardizabal 5, E-20018 Donostia-San Sebastián, Spain;2. Donostia International Physics Center (DIPC), Paseo Manuel de Lardizabal 4, E-20018 Donostia-San Sebastián, Spain;3. IKERBASQUE, Basque Foundation for Science, E-48013 Bilbao, Spain;4. Departamento de Química-Física, UPV/EHU, Apartado 644, 48080 Bilbao, Spain;5. Department of Physics, Shanghai University, 200444 Shanghai, People''s Republic of China
Abstract:The present paper proposes a new Fin Field Effect Transistor (FinFET) with an amended Channel (AC). The fin region consists of two sections; the lower part which has a rounded shape and the upper part of fin as conventional FinFETs, is cubic. The AC-FinFET devices are proven to have a lower threshold voltage roll-off, reduced DIBL, better subthreshold slope characteristics, and a better gate capacitance in comparison with the C-FinFET. Moreover, the simulation result with three-dimensional and two-carrier device simulator demonstrates an improved output characteristic of the proposed structure due to reduction of self-heating effect. Due to the rounded shape of the lower fin region and decreasing corner effects there, the heat can flow easily, and the device temperature will decrease. Also the gate control over the channel increases due to the narrow upper part of the fin. The paper, thus, attempts to show the advantages of higher performance AC-FinFET device over the conventional one, and its effect on the operation of nanoscale devices.
Keywords:Short channel effect (SCE)  Drain-induced barrier lowering (DIBL)  Self-heating effects  FinFET  Three dimensional simulations
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