Improved Design of 8-Channel Silicon-on-Insulator (SOI) Arrayed Waveguide Grating (AWG) Multiplexer Using Tapered Entry into the Slab Waveguides |
| |
| Authors: | AJI BABY B. R. SINGH AMIT GANGOPADHYAY |
| |
| Affiliation: | 1. Central Electronics Engineering Research Institute, Pilani, Rajasthan, India;2. Department of Electronics, Tezpur University, Assam, India |
| |
| Abstract: | ![]()
An improved design of silicon-on-insulator based 8 × 8 AWG multiplexer is presented using tapered entry into the slab waveguide. Our simulation result clearly shows significant enhancement of electric field from 0.44 V/m to 0.732 V/m, reduction in insertion loss from 7.13 db to 2.7 db, with bandwidth of 230 GHz and channel spacing 200 GHz while keeping other parameters within acceptable limits. |
| |
| Keywords: | integrated optics silicon-on-insulator arrayed waveguide multiplexer |
|
|
