Defects analysis and improvement of a chaotic logic gate |
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Authors: | Yiyan Sheng Wenbo Liu |
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Affiliation: | Department of Automation, Nanjing University of Aeronautics and Astronautics, Nanjing, China |
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Abstract: | ![]() We introduced one chaotic logic gate design and described its performance defects. These defects, namely nondeterminacy and variability of the output signal, were depicted and analysis for the reasons behind them was done. Further more, a new logic gate design by changing the variable under control is proposed. By successfully overcoming defects of the prototype, the new chaotic logic gate can be better applied to a complicated computing architecture. |
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