An oxide/silicon core/shell nanowire metal-oxide semiconductor field-effect transistor

This paper studies an oxide/silicon {c}ore/{s}hell {n}anowire {M}OSFET (OS-CSNM). Through three-dimensional device simulations, we have demonstrated that the OS-CSNM has a lower leakage current and higher $I_{\rm on}/I_{\rm off}$ ratio after introducing the oxide core into a {t}raditional {n}anowire {M}OSFET (TNM). The oxide/silicon OS-CSNM structure suppresses threshold voltage roll-off, drain induced barrier lowering and subthreshold swing degradation. Smaller intrinsic device delay is also observed in OS-CSNM in comparison with that of TNM.