|
|||||
|
|
Surface etching induced by Ce silicide formation on Si(1 0 0) |
|
| Authors: | Dohyun Lee G Lee Chanyong Hwang Hangil Lee |
| Institution: | a Advanced Industrial Technology Group, Division of Advanced Technology, Korea Research Institute of Standards and Science, Daejeon 305-600, Republic of Korea b Department of Chemistry and School of Molecular Science (BK21), Korea Advanced Institute of Science and Technology, Daejeon 305-701, Republic of Korea c Department of Physics, Inha University, Inchon 402-751, Republic of Korea d Beamline Research Division, Pohang Accelerator Laboratory (PAL), POSTECH, Pohang, Kyongbuk 790-784, Republic of Korea |
| Abstract: | We investigate the temperature-dependent surface etching process induced by Ce silicide on Si(1 0 0) using scanning tunneling microscopy and X-ray photoelectron spectroscopy. We found that step edges on the Si(1 0 0) surface are gradually roughened due to the formation of Ce silicide as a function of substrate temperature. Unlike the Si(1 1 1) surface, however, terrace etching also occurs in addition to step roughening at 500 °C. Moreover, we found that Si(1 0 0) dimers are released and formed dimer vacancy lines because bulk diffusion of Ce silicide into Si(1 0 0) surface occurs the defect-induced strain at higher temperature (∼600 °C). |
| Keywords: | Surface etching STM XPS DVL Step roughening |
| 本文献已被 ScienceDirect 等数据库收录！ | |