Lead zirconate titanate behaviors in an LDMOS

The behaviors of lead zirconate titanate (PZT) deposited as the dielectric for high-voltage devices are investigated experimentally and theoretically. The devices demonstrate not only high breakdown voltages above 350 V, but also excellent memory behaviors. A drain current-gate voltage (ID-VG) memory window of about 2.2 V is obtained at the sweep voltages of ±10 V for the 350-V laterally diffused metal oxide semiconductor (LDMOS). The retention time of about 270 s is recorded for the LDMOS through a controlled ID-VG measurement. The LDMOS with memory behaviors has potential to be applied in future power conversion circuits to boost the performance of the energy conversion system.     

中间层组成对坯体连接CePO4-ZrO2陶瓷强度和界面结构的影响

用含CePO4和ZrO2的中间层将25％CeP04／ZrO2和ZrO2陶瓷坯体在无压条件下连接起来后，经1450℃保温2h烧结成一整体，分析了CePO4／(ZrO2 CePO4)比例对连接结合强度的影响，并发现在实现条件下，连接面处的颗粒基体小，显微结构比基体更均匀、致密，没有明显的裂纹、气孔和其他缺陷。     

PZT铁电薄膜底电极制备工艺的研究

利用磁控溅射方法在Si(001)基片上制备Ti/Pt底电极,其厚度大概分别为20、100 nm,其中Ti电极作为缓冲层,随后在上面溅射PZT铁电薄膜.研究了不同电极的制备工艺对电极形貌、取向以及对PZT铁电薄膜的制备带来的影响.结果表明,底电极的溅射温度以及退火温度对于底电极起着至关重要的作用,同时具有良好(111)取向的、致密性较好的底电极对于PZT铁电薄膜的生长具有重要的影响.