An Inverter-Based,CMOS, Low-Power Optical Receiver Front-End

In this paper, a low-power optical receiver front-end which consists of a transimpedance amplifier (TIA) and three stages of limiting amplifier (LA) for 2.5 Gb/s applications is proposed in 0.18 µm CMOS technology. The proposed TIA benefits from a modified inverter structure, in which the input resistance is properly reduced due to the use of diode-connected transistors in comparison with conventional inverter circuit. Also, an active inductor is used in parallel with a diode-connected transistor at the output node, which provides a low output resistance, while it resonates with the load capacitance to extend the ?3 dB frequency bandwidth. Moreover, three stages of LAs are used to obtain extra gain, in which each LA cell uses active inductor load. However, HSPICE simulations for the proposed TIA circuit show a 42.24 dBΩ transimpedance gain, 1.96 GHz frequency bandwidth, 11.7 pA/√Hz input referred noise, and only 972 µW of power consumption at 1.5 V supply. Also, simulation results for the whole receiver system show a 75.6 dB gain, 1.7 GHz frequency bandwidth, and 6.54 mW of power consumption at 1.5 V supply. Finally, simulation results indicate that the proposed receiver system has good performances to be used as a low-power optical receiver front-end.     

A CMOS Low-Power Optical Front-End for 5 Gbps Applications

In this paper, a new low-power optical receiver front-end is proposed in 90 nm CMOS technology for 5 Gb/s AApplications. However, to improve the gain-bandwidth trade-off, the proposed Trans-Impedance Amplifier (TIA) uses an active modified inverter-based topology followed by a common-source amplifier, which uses active inductive peaking technique to enhance the frequency bandwidth in an increased gain level for a reasonable power consumption value. The proposed TIA is analyzed and simulated in HSPICE using 90 nm CMOS technology parameters. Simulation results show a 53.5dBΩ trans-impedance gain, 3.5 GHz frequency bandwidth, 16.8pA/√Hz input referred noise, and 1.28 mW of power consumption at 1V supply voltage. The Optical receiver is completed using three stages of differential limiting amplifiers (LAs), which provide 27 dB voltage gain while consume 3.1 mW of power. Finally, the whole optical receiver front-end consumes only 5.6 mW of power at 1 V supply and amplifies the input signal by 80 dB, while providing 3.7 GHz of frequency bandwidth. Finally, the simulation results indicate that the proposed optical receiver is a proper candidate to be used in a low-power 5 Gbps optical communication system.