异质多晶SiGe栅应变Si NMOSFET物理模型研究

结合了“栅极工程”和“应变工程”二者的优点, 异质多晶SiGe栅应变Si MOSFET, 通过沿沟道方向使用不同功函数的多晶SiGe材料, 在应变的基础上进一步提高了MOSFET的性能. 本文结合其结构模型, 以应变Si NMOSFET为例, 建立了强反型时的准二维表面势模型, 并进一步获得了其阈值电压模型以及沟道电流的物理模型. 应用MATLAB对该器件模型进行了分析, 讨论了异质多晶SiGe栅功函数及栅长度、衬底SiGe中Ge组分等参数对器件阈值电压、沟道电流的影响, 获得了最优化的异质栅结构. 模型所得结果与仿真结果及相关文献给出的结论一致, 证明了该模型的正确性. 该研究为异质多晶SiGe栅应变Si MOSFET的设计制造提供了有价值的参考. 关键词： 异质多晶SiGe栅 应变Si NMOSFET 表面势 沟道电流     

应变Si NMOSFET漏电流解析模型

基于应变Si/SiGe器件结构,本文建立了统一的应变Si NMOSFET漏电流解析模型. 该模型采用平滑函数,实现了应变Si NMOSFET漏电流及其导数,从亚阈值区到强反型区以及从线性区到饱和区的平滑性,解决了模型的连续性问题. 同时考虑了载流子速度饱和效应和沟道长度调制效应的影响,进一步提高了模型精度. 通过将模型的仿真结果和实验结果对比分析,验证了所建模型的有效性. 该模型可为应变Si数字集成电路和模拟集成电路分析、设计提供重要参考. 关键词： 应变Si NMOSFET 漏电流 解析模型     

应变SiGe p 型金属氧化物半导体场效应管栅电容特性研究

由于台阶的出现, 应变SiGe p型金属氧化物半导体场效应管 (pMOSFET) 的栅电容特性与体Si器件的相比呈现出很大的不同, 且受沟道掺杂的影响严重. 本文在研究应变SiGe pMOSFET器件的工作机理及其栅电容C-V 特性中台阶形成机理的基础上, 通过求解器件不同工作状态下的电荷分布, 建立了应变SiGe pMOSFET栅电容模型, 探讨了沟道掺杂浓度对台阶的影响. 与实验数据的对比结果表明, 所建立模型能准确反映应变SiGe pMOSFET器件的栅电容特性, 验证了模型的正确性. 该理论为Si基应变金属氧化物半导体(MOS)器件的设计制造提供了重要的指导作用, 并已成功应用于Si基应变器件模型参数提取软件中, 为Si基应变MOS的仿真奠定了理论基础. 关键词： 应变SiGe pMOSFET 栅电容特性 台阶效应 沟道掺杂     

Two-dimensional threshold voltage model of a nanoscale silicon-on-insulator tunneling field-effect transistor

The tunneling field-effect transistor(TFET) is a potential candidate for the post-CMOS era.In this paper,a threshold voltage model is developed for this new kind of device.First,two-dimensional(2D) models are used to describe the distributions of potential and electric field in the channel and two depletion regions.Then based on the physical definition of threshold voltage for the nanoscale TFET,the threshold voltage model is developed.The accuracy of the proposed model is verified by comparing the calculated results with the 2D device simulation data.It has been demonstrated that the effects of varying the device parameters can easily be investigated using the model presented in this paper.This threshold voltage model provides a valuable reference to TFET device design,simulation,and fabrication.     

应变Si NMOS积累区电容特性研究

积累区MOS电容线性度高且不受频率限制, 具有反型区MOS电容不可比拟的优势. 本文在研究应变Si NMOS电容C-V特性中台阶效应形成机理的基础上, 通过求解电荷分布, 建立了应变Si/SiGe NMOS积累区电容模型, 并与实验结果进行了对比, 验证了模型的正确性. 最后, 基于该模型, 研究了锗组分、应变层厚度、掺杂浓度等参数对台阶效应的影响, 为应变Si器件的制造提供了重要的指导作用. 本模型已成功用于硅基应变器件模型参数提取软件中, 为器件仿真奠定了理论基础. 关键词： 应变Si NMOS 积累区电容 台阶效应 电荷分布     

Effect of substrate doping on the flatband and threshold voltages of strained-Si pMOSFET

The effect of substrate doping on the flatband and threshold voltages of strained-Si/SiGe p metal-oxide semiconductor field-effect transistor (pMOSFET) has been studied. By physically deriving the models of the flatband and threshold voltages, which have been validated by numerical simulation and experimental data, the shift in the plateau from the inversion region to the accumulation region as the substrate doping increases has been explained. The proposed model can provide valuable reference to the designers of strained-Si devices and has been implemented in software for extracting the parameters of strained-Si MOSFET.     

The effect of substrate doping on the flatband and threshold voltages of a strained-Si pMOSFET

The effect of substrate doping on the flatband and threshold voltages of a strained-Si/SiGe p metal-oxide semiconductor field-effect transistor(pMOSFET) has been studied.By physically deriving the models of the flatband and threshold voltages,which have been validated by numerical simulation and experimental data,the shift in the plateau from the inversion region to the accumulation region as the substrate doping increases has been explained.The proposed model can provide a valuable reference to the designers of strained-Si devices and has been implemented in software for extracting the parameters of a strained-Si MOSFET.     

Weak avalanche multiplication in SiGe heterojunction bipolar transistors on thin film silicon-on-insulator

In this paper, we propose an analytical avalanche multiplication model for the next generation of SiGe silicon-on-insulator (SOI) heterojunction bipolar transistors (HBTs) and consider their vertical and lateral impact ionizations for the first time. Supported by experimental data, the analytical model predicts that the avalanche multiplication governed by impact ionization shows kinks and the impact ionization effect is small compared with that of the bulk HBT, resulting in a larger base-collector breakdown voltage. The model presented in the paper is significant and has useful applications in the design and simulation of the next generation of SiGe SOI BiCMOS technology.     

Two-dimensional threshold voltage model of nanoscale silicon-on-insulator tunneling field-effect transistor

The tunneling field-effect transistor (TFET) is a potential candidate for the post-CMOS era. In this paper, a threshold voltage model is developed for this new kind of device. First, two-dimensional (2D) models are used to describe the distributions of potential and electric field in the channel and two depletion regions. Then based on the physical definition of threshold voltage for the nanoscale TFET, the threshold voltage model is developed. The accuracy of the proposed model is verified by comparing the calculated results with the 2D device simulation data. It has been demonstrated that the effects of varying the device parameters can easily be investigated using the model presented in this paper. This threshold voltage model provides a valuable reference to the TFET device design, simulation, and fabrication.     

新型高速半导体器件IMOS阈值电压解析模型

本文在研究IMOS器件结构的基础上, 分析了该器件不同区域的表面电场, 结合雪崩击穿条件, 建立了P-IMOS的阈值电压解析模型. 应用MATLAB对该器件阈值电压模型与源漏电压、栅长和硅层厚度的关系进行了数值分析, 并用二维器件仿真工具ISE进行了验证. 结果表明, 源电压越大, 阈值电压值越小; 栅长所占比例越大, 阈值电压值越小, 硅层厚度越小, 阈值电压值越小. 本文提出的模型与ISE仿真结果一致, 也与文献报道符合. 这种新型高速半导体器件IMOS阈值电压解析模型的建立为该高性能器件及对应电路的设计、仿真和制造提供了重要的参考.